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Sat, 10 Oct 2026 22:44:54 -0700 (PDT) Received: from [192.168.21.192] ([24.18.106.4]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3537c841648sm23485573eec.3.2026.10.10.22.44.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 10 Oct 2026 22:44:54 -0700 (PDT) Message-ID: <17a20959-44ed-43e5-8414-201120468f2f@gmail.com> Date: Sat, 10 Oct 2026 22:44:52 -0700 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Betterbird (Linux) Subject: Re: [PATCH] PCI: Set supported_speeds in set_pcie_port_type() To: Stian Halseth , Bjorn Helgaas Cc: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Andreas Larsson , linux-pci@vger.kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org References: <20261007131304.309511-1-stian@itx.no> Content-Language: en-US From: Tony Rodriguez In-Reply-To: <20261007131304.309511-1-stian@itx.no> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit This patch also works on the Sparc S7-2, the correct x8 link is shown instead of unknown. # dmesg | grep -iE x8 | grep -iE link [    8.421411] mlx5_core 0001:03:00.0: 63.008 Gb/s available PCIe bandwidth (8.0 GT/s PCIe x8 link) [    9.472465] mlx5_core 0001:03:00.1: 63.008 Gb/s available PCIe bandwidth (8.0 GT/s PCIe x8 link) [   14.734746] mlx4_core 0001:04:00.0: 63.008 Gb/s available PCIe bandwidth (8.0 GT/s PCIe x8 link) Tested-by: Tony Rodriguez On 10/7/26 6:13 AM, Stian Halseth wrote: > sparc64 and powerpc create PCI devices from the device tree in > of_create_pci_dev(), which calls set_pcie_port_type() but not > pci_setup_device(). Since d2bd39c0456b, supported_speeds is only set in > pci_setup_device(), so it stays 0 for these devices. > pcie_get_speed_cap() then returns PCI_SPEED_UNKNOWN, max_link_speed > reads "Unknown", and the failed link retraining quirk passes > PCI_SPEED_UNKNOWN to pcie_set_target_speed(), which warns on a SPARC > T7-1: > > WARNING: drivers/pci/pcie/bwctrl.c:125 at pcie_set_target_speed+0x284/0x2e0 > > Set supported_speeds in set_pcie_port_type(), which all three paths > call. > > Fixes: d2bd39c0456b ("PCI: Store all PCIe Supported Link Speeds") > Closes: https://github.com/sparclinux/issues/issues/109 > Signed-off-by: Stian Halseth > --- > Tested on a SPARC T7-1: before, max_link_speed reads "Unknown" and the > warning above appears with CONFIG_PCIEPORTBUS; after, all 23 PCIe > devices report their real speed and the quirk lifts the 2.5GT/s > restriction without a warning. Not tested on powerpc. > > drivers/pci/probe.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c > index 27008e2ea5afc..52a79b033b069 100644 > --- a/drivers/pci/probe.c > +++ b/drivers/pci/probe.c > @@ -1651,6 +1651,8 @@ void set_pcie_port_type(struct pci_dev *pdev) > pdev->aspm_l1_support = 1; > #endif > > + pdev->supported_speeds = pcie_get_supported_speeds(pdev); > + > parent = pci_upstream_bridge(pdev); > if (!parent) > return; > @@ -2074,9 +2076,6 @@ int pci_setup_device(struct pci_dev *dev) > > set_pcie_untrusted(dev); > > - if (pci_is_pcie(dev)) > - dev->supported_speeds = pcie_get_supported_speeds(dev); > - > /* "Unknown power state" */ > dev->current_state = PCI_UNKNOWN; >