From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id D487AB710F for ; Mon, 15 Jun 2009 14:31:03 +1000 (EST) Received: from bilbo.ozlabs.org (bilbo.ozlabs.org [203.10.76.25]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "bilbo.ozlabs.org", Issuer "CAcert Class 3 Root" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id BFF31DDD01 for ; Mon, 15 Jun 2009 14:31:03 +1000 (EST) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Message-ID: <18997.52863.576426.501025@cargo.ozlabs.ibm.com> Date: Mon, 15 Jun 2009 14:30:55 +1000 From: Paul Mackerras To: Roland Dreier Subject: Re: [PATCH 1/2] lib: Provide generic atomic64_t implementation In-Reply-To: References: <18995.20685.227683.561827@cargo.ozlabs.ibm.com> <4A34E4A5.3040306@redhat.com> <18996.60235.178618.531664@cargo.ozlabs.ibm.com> <4A34F564.2010500@redhat.com> Cc: linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, Avi Kivity , akpm@linux-foundation.org, Linus Torvalds List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Roland Dreier writes: > FWIW, Nehalem EX actually goes to 8 cores/16 threads per socket. But > worrying about 32-bit performance on Nehalem is a little silly -- this > simplest solution is simply to run a 64-bit kernel. I'm not worried about ANY x86 processor, 32-bit or 64-bit, in fact, since x86 already has an atomic64_t implementation for both 32-bit and 64-bit. It is interesting, though, that arch/x86/include/asm/atomic_32.h unconditionally uses cmpxchg8b to implement atomic64_t, but I thought that cmpxchg8b didn't exist in processors prior to the Pentium. Presumably you can't use perf_counters on a 386 or 486. Paul.