Re: Support for Hydra i2c

[Michel Lanners <mlan@cpu.lu>]

Hi all,

On  10 May, this message from Geert Uytterhoeven echoed through cyberspace:
[snip]
>> > and maybe some more stuffs.
>> 
>> The only device on this I2C bus in the PCI Macs that I know off is the
>> RADACAL RAMDAC/CLUT (used at least with the control chip), which gets
>> its timebase factors via I2C.
>> 
>> > Unfortunately, I think we only know how to write to the i2c bus.
>> 
>> Yes.

On the other hand, you I2C gurus mihgt know that, but the R/W bit on the
I2C bus is actually the lsb of the address; i.e address a device with
an even address, and it expects to recive some data; address it with an
odd address, and the device will write data to the bus.

>> > More hacking needed before we can implement this one too.
>> 
>> One problem might be that there is as yet no readable device on the bus
>> ;-).
>
> Really? Since i2c devices need to identify on the bus, you must be able to read
> something from them.

I did some experimentation on the cuda I2C bus while searching for the
PlanB I2C device. I scanned a whole range of I2C addresses, both read
and write, but didn't find anything apart from RADACAL.

> Are there OF methods for the i2c bus on those Macs? My CHRP box has them under
> /pci/mac-io@2/misc@0/iic/.

I'll check in OF on the next reboot ;-)

Michel

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