From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from py-out-1112.google.com (py-out-1112.google.com [64.233.166.177]) by ozlabs.org (Postfix) with ESMTP id D34FF67B5B for ; Wed, 25 Oct 2006 16:44:36 +1000 (EST) Received: by py-out-1112.google.com with SMTP id f25so49356pyf for ; Tue, 24 Oct 2006 23:44:02 -0700 (PDT) Message-ID: <1b2aacd80610242246n20075a33pcc76ab5be71fb87e@mail.gmail.com> Date: Tue, 24 Oct 2006 22:46:12 -0700 From: "Luong Ngo" To: "Kumar Gala" Subject: Re: MPC8343: PCI resource allocation questions In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_104533_6573733.1161755172001" References: <1b2aacd80610242049j23917f61x1e277b4c6a581f9a@mail.gmail.com> Cc: linuxppc-dev list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , ------=_Part_104533_6573733.1161755172001 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline Kumar, thanks a lot for your prompt and clear answers. But I still have a couple questions about the BARs. > The PCI resources are used for any PCI devices that need memory > mapped space allocated to them. What devices are you connecting over > PCI? I am connecting Broadcom BCM56502 controllers over PCI. The region was large since the reference board has general purpose PCI slots for any number of various cards. We provide a large space to allow for those cards to be allocated into. Depending on your application you can adjust this as you need. I'm a bit confused here. If the host bridge is ignored/excluded, then the region size in BARs will not be allocated corresponding resource by the PCI subsystem, then how would other PCI devices in the slots could be allocated in the BAR's range? If I understand correctly, the PCI devices's resources are allocated based on the bridge resource, which is assigned statically by PCI subsystem using hose->mem_space and hose->io_space instead of reading it from the BARs. Maybe you are saying in the case the CPU is in agent mode and its PCI host bridge is functioning as a PCI-PCI bridge? You are not leaving any memory space for any of the onchip devices, the error messages are because the regions of memory that the devices are expected to be at are already occupied by the PCI space. Isn't it the PCI IO and PCI MEM space are separated from local memory space? I believe I see the global io_resource and mem_resource have the range of 0x0 - 0xFFFFFFFF. I appreciate your help, Thanks, Luong Ngo ------=_Part_104533_6573733.1161755172001 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline
Kumar, thanks a lot for your prompt and clear answers. But I still have a couple questions about the BARs.
 
The PCI resources are used for any PCI devices that need memory
mapped space allocated to them.  What devices are you connecting over
PCI?
 
I am connecting Broadcom BCM56502 controllers over PCI.

The region was large since the reference board has general purpose
PCI slots for any number of various cards.  We provide a large space
to allow for those cards to be allocated into.  Depending on your
application you can adjust this as you need.
 
I'm a bit confused here. If the host bridge is ignored/excluded, then the region size in BARs will not be allocated corresponding resource by the PCI subsystem, then how would other PCI devices in the slots could be allocated in the BAR's range? If I understand correctly, the PCI devices's resources are allocated based on the bridge resource, which is assigned statically by PCI subsystem using hose->mem_space and hose->io_space instead of reading it from the BARs. Maybe you are saying in the case the CPU is in agent mode and its PCI host bridge is functioning as a PCI-PCI bridge?
 
You are not leaving any memory space for any of the onchip devices,
the error messages are because the regions of memory that the devices
are expected to be at are already occupied by the PCI space.
 
Isn't it the PCI IO and PCI MEM space are separated from local memory space? I believe I see the global io_resource and mem_resource have the range of 0x0 - 0xFFFFFFFF.

I appreciate your help,
 
Thanks,
Luong Ngo

 

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