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Subject: Re: [PATCH v2 1/3] powerpc/pseries: Parse control memory access error
To: linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au
References: <20210805092025.272871-1-ganeshgr@linux.ibm.com>
From: Ganesh <ganeshgr@linux.ibm.com>
Message-ID: <1e5a7f4b-ddf7-69f2-bbaf-913644175c3e@linux.ibm.com>
Date: Tue, 24 Aug 2021 00:23:39 +0530
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Hi mpe, Any comments on this patchset?

On 8/5/21 2:50 PM, Ganesh Goudar wrote:

> Add support to parse and log control memory access
> error for pseries.
>
> Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
> ---
> v2: No changes in this patch.
> ---
>   arch/powerpc/platforms/pseries/ras.c | 21 +++++++++++++++++++++
>   1 file changed, 21 insertions(+)
>
> diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
> index 167f2e1b8d39..608c35cad0c3 100644
> --- a/arch/powerpc/platforms/pseries/ras.c
> +++ b/arch/powerpc/platforms/pseries/ras.c
> @@ -80,6 +80,7 @@ struct pseries_mc_errorlog {
>   #define MC_ERROR_TYPE_TLB		0x04
>   #define MC_ERROR_TYPE_D_CACHE		0x05
>   #define MC_ERROR_TYPE_I_CACHE		0x07
> +#define MC_ERROR_TYPE_CTRL_MEM_ACCESS	0x08
>   
>   /* RTAS pseries MCE error sub types */
>   #define MC_ERROR_UE_INDETERMINATE		0
> @@ -103,6 +104,9 @@ struct pseries_mc_errorlog {
>   #define MC_ERROR_TLB_MULTIHIT		2
>   #define MC_ERROR_TLB_INDETERMINATE	3
>   
> +#define MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK	0
> +#define MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS	1
> +
>   static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
>   {
>   	switch (mlog->error_type) {
> @@ -112,6 +116,8 @@ static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
>   	case	MC_ERROR_TYPE_ERAT:
>   	case	MC_ERROR_TYPE_TLB:
>   		return (mlog->sub_err_type & 0x03);
> +	case	MC_ERROR_TYPE_CTRL_MEM_ACCESS:
> +		return (mlog->sub_err_type & 0x70) >> 4;
>   	default:
>   		return 0;
>   	}
> @@ -699,6 +705,21 @@ static int mce_handle_err_virtmode(struct pt_regs *regs,
>   	case MC_ERROR_TYPE_I_CACHE:
>   		mce_err.error_type = MCE_ERROR_TYPE_ICACHE;
>   		break;
> +	case MC_ERROR_TYPE_CTRL_MEM_ACCESS:
> +		mce_err.error_type = MCE_ERROR_TYPE_RA;
> +		if (mce_log->sub_err_type & 0x80)
> +			eaddr = be64_to_cpu(mce_log->effective_address);
> +		switch (err_sub_type) {
> +		case MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK:
> +			mce_err.u.ra_error_type =
> +				MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN;
> +			break;
> +		case MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS:
> +			mce_err.u.ra_error_type =
> +				MCE_RA_ERROR_LOAD_STORE_FOREIGN;
> +			break;
> +		}
> +		break;
>   	case MC_ERROR_TYPE_UNKNOWN:
>   	default:
>   		mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN;

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    <pre>Hi mpe, Any comments on this patchset?
</pre>
    <div class="moz-cite-prefix">
      <pre>On 8/5/21 2:50 PM, Ganesh Goudar wrote:</pre>
    </div>
    <blockquote type="cite"
      cite="mid:20210805092025.272871-1-ganeshgr@linux.ibm.com">
      <pre class="moz-quote-pre" wrap="">Add support to parse and log control memory access
error for pseries.

Signed-off-by: Ganesh Goudar <a class="moz-txt-link-rfc2396E" href="mailto:ganeshgr@linux.ibm.com">&lt;ganeshgr@linux.ibm.com&gt;</a>
---
v2: No changes in this patch.
---
 arch/powerpc/platforms/pseries/ras.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 167f2e1b8d39..608c35cad0c3 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -80,6 +80,7 @@ struct pseries_mc_errorlog {
 #define MC_ERROR_TYPE_TLB		0x04
 #define MC_ERROR_TYPE_D_CACHE		0x05
 #define MC_ERROR_TYPE_I_CACHE		0x07
+#define MC_ERROR_TYPE_CTRL_MEM_ACCESS	0x08
 
 /* RTAS pseries MCE error sub types */
 #define MC_ERROR_UE_INDETERMINATE		0
@@ -103,6 +104,9 @@ struct pseries_mc_errorlog {
 #define MC_ERROR_TLB_MULTIHIT		2
 #define MC_ERROR_TLB_INDETERMINATE	3
 
+#define MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK	0
+#define MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS	1
+
 static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
 {
 	switch (mlog-&gt;error_type) {
@@ -112,6 +116,8 @@ static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
 	case	MC_ERROR_TYPE_ERAT:
 	case	MC_ERROR_TYPE_TLB:
 		return (mlog-&gt;sub_err_type &amp; 0x03);
+	case	MC_ERROR_TYPE_CTRL_MEM_ACCESS:
+		return (mlog-&gt;sub_err_type &amp; 0x70) &gt;&gt; 4;
 	default:
 		return 0;
 	}
@@ -699,6 +705,21 @@ static int mce_handle_err_virtmode(struct pt_regs *regs,
 	case MC_ERROR_TYPE_I_CACHE:
 		mce_err.error_type = MCE_ERROR_TYPE_ICACHE;
 		break;
+	case MC_ERROR_TYPE_CTRL_MEM_ACCESS:
+		mce_err.error_type = MCE_ERROR_TYPE_RA;
+		if (mce_log-&gt;sub_err_type &amp; 0x80)
+			eaddr = be64_to_cpu(mce_log-&gt;effective_address);
+		switch (err_sub_type) {
+		case MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK:
+			mce_err.u.ra_error_type =
+				MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN;
+			break;
+		case MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS:
+			mce_err.u.ra_error_type =
+				MCE_RA_ERROR_LOAD_STORE_FOREIGN;
+			break;
+		}
+		break;
 	case MC_ERROR_TYPE_UNKNOWN:
 	default:
 		mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN;
</pre>
    </blockquote>
  </body>
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