* altivec instructions
@ 2000-01-24 18:52 Jim Terman
2000-01-24 21:32 ` Tony Mantler
0 siblings, 1 reply; 4+ messages in thread
From: Jim Terman @ 2000-01-24 18:52 UTC (permalink / raw)
To: linuxppc-dev
We are trying to run a program that contains altivec instructions on a G4,
but the process keeps crashing (gdb will actually cause a kernal panic).
It looks like a bit in the MSR needs to be set. What would be the best
way to modify the kernel to let this happen?
--
______________________________________________________________________________
Jim Terman | 323 Vintage Park Dr. | Voice: (650) 356-5446
terman@ddi.com | Foster City, CA | Fax: (650) 356-5490
Diab-SDS, Inc. | 94404 | web site - http://www.ddi.com
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: altivec instructions
2000-01-24 18:52 altivec instructions Jim Terman
@ 2000-01-24 21:32 ` Tony Mantler
2000-01-24 22:16 ` Robert Neugebauer
0 siblings, 1 reply; 4+ messages in thread
From: Tony Mantler @ 2000-01-24 21:32 UTC (permalink / raw)
To: Jim Terman, linuxppc-dev
At 12:52 PM -0600 1/24/00, Jim Terman wrote:
>We are trying to run a program that contains altivec instructions on a G4,
>but the process keeps crashing (gdb will actually cause a kernal panic).
>It looks like a bit in the MSR needs to be set. What would be the best
>way to modify the kernel to let this happen?
Before you enable the MSR bit, you'll have to write altivec register saving
code for your kernel, the strategies for which were discussed a while back
on this mailing list, and should be available for your reading convinience
on the mailing list archive.
Following that, you'll have to check to be sure your code properly uses the
VRSAVE register, to avoid forward compatibility problems.
Once that's all done, your code should run just fine.
Cheers - Tony :)
--
Tony Mantler Renaissance Nerd Extraordinaire eek@escape.ca
Winnipeg, Manitoba, Canada http://www.escape.ca/~eek
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: altivec instructions
2000-01-24 21:32 ` Tony Mantler
@ 2000-01-24 22:16 ` Robert Neugebauer
2000-01-24 23:32 ` Tony Mantler
0 siblings, 1 reply; 4+ messages in thread
From: Robert Neugebauer @ 2000-01-24 22:16 UTC (permalink / raw)
To: linuxppc-dev
Wouldn't the 2.2 kernel patches for altivec instructions handle that. I
don't know if they were supported, but they worked on my G4 and haven't
caused any instability. I had found them somewhere on devel.linuxppc.org.
I can send them too you if you need.
Bob
On Mon, 24 Jan 2000, Tony Mantler wrote:
>
> At 12:52 PM -0600 1/24/00, Jim Terman wrote:
> >We are trying to run a program that contains altivec instructions on a G4,
> >but the process keeps crashing (gdb will actually cause a kernal panic).
> >It looks like a bit in the MSR needs to be set. What would be the best
> >way to modify the kernel to let this happen?
>
> Before you enable the MSR bit, you'll have to write altivec register saving
> code for your kernel, the strategies for which were discussed a while back
> on this mailing list, and should be available for your reading convinience
> on the mailing list archive.
>
> Following that, you'll have to check to be sure your code properly uses the
> VRSAVE register, to avoid forward compatibility problems.
>
>
> Once that's all done, your code should run just fine.
>
>
> Cheers - Tony :)
>
>
> --
> Tony Mantler Renaissance Nerd Extraordinaire eek@escape.ca
> Winnipeg, Manitoba, Canada http://www.escape.ca/~eek
>
>
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: altivec instructions
2000-01-24 22:16 ` Robert Neugebauer
@ 2000-01-24 23:32 ` Tony Mantler
0 siblings, 0 replies; 4+ messages in thread
From: Tony Mantler @ 2000-01-24 23:32 UTC (permalink / raw)
To: Robert Neugebauer, linuxppc-dev
At 4:16 PM -0600 1/24/00, Robert Neugebauer wrote:
>Wouldn't the 2.2 kernel patches for altivec instructions handle that. I
>don't know if they were supported, but they worked on my G4 and haven't
>caused any instability. I had found them somewhere on devel.linuxppc.org.
>
>I can send them too you if you need.
>
>Bob
[...]
*search, search* Ah, so there is a patch. I assume this is the one you're
referring to?
<http://devel.linuxppc.org/ftp/users/ajoshi/altivec-2.2.patch>
It might just be my imagination, but for some reason it doesn't look like
that patch actually touches any altivec registers other than the VRSAVE...
For a single altivec task on a UP system it might work, though.
While I'm on the subject, does GCC even have altivec support yet? It seems
I always miss all the important announcements... :)
Cheers - Tony :)
--
Tony Mantler Renaissance Nerd Extraordinaire eek@escape.ca
Winnipeg, Manitoba, Canada http://www.escape.ca/~eek
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
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2000-01-24 18:52 altivec instructions Jim Terman
2000-01-24 21:32 ` Tony Mantler
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2000-01-24 23:32 ` Tony Mantler
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