crash loadin bash after booting linux on a MPC860ADS

crash loadin bash after booting linux on a MPC860ADS

[Eisenzopf Thomas]

Hello,

thanks again for the suggestions from some members of this mailing list. I
managed to reconfigure my kernel and now I can boot linux until the NFS root
filesystem is mounted.

But after this the kernel tries to load the shell /bin/sh from NFS, at this
point the system crashes. My kernel includes the patches from
www.s4l.de/powerpc.html.

Please, can anyone help? I took the ramdisk.image.gz filesystem from
www.s4l.de/powerpc.html. This should be working for PowerPC(?). On the other
hand I tried to get my own filesystem (crosscompile bash, ...), but it
didn´t work. Perhaps someone could support me with a tarball of a filesystem
working on a MPC860ADS board with NFS root filesystem? How can I make a
filesystem on my own (on an Intel PC)?

Any help is appreciated.

Best regards,
Thomas.



8xxROM 0.3.0

compiletime options:
board: ADS DRAM_50MHZ
disk: DISK_ROM

cpu: XPC860xxZPnnA3 at 48 MHz: 4Kbyte icache 4Kbyte dcache

<warning: cpu core has silicon bugs, check the errata>

board: ADS rev B
flash: 2 Mbytes, delay 90 ns
dram: EDO, 16 Mbyte, 60 ns, OK
pcmcia: No card present.

Boot device list:
 rom: rom_disk

Found ext2 filesystem

rom:0:/> bootz
Size 474838
4 blocks

entry 0x100000, phoff 0x34, shoff 0x72e6c
phnum 0x1, shnum 0x9
p_offset 0x10000, p_vaddr 0x100000, p_paddr 0x100000
p_filesz 0x530c, p_memsz 0xb1cc
Loading at 0x10c000
Size 474838
464 blocks
Starting 0x11c000
loaded at:     0011C000 001271CC
relocated to:  00100000 0010B1CC
board data at: 00FF0000 00FF001C
relocated to:  00200100 0020011C
zimage at:     00122000 0017EE32
avail ram:     0017F000 01000000

Linux/PPC load: mem=0x1000000
Uncompressing Linux...done.
Now booting the kernel
Linux version 2.2.13 (eisenzopft@pca355) (gcc version 2.95.2 19991024
(release))
 #39 Tue Apr 4 17:12:01 Local time zone must be set--see zic manual page
2000
Boot arguments: mem=0x1000000
time_init: decrementer frequency = 180000000/60
Calibrating delay loop... 47.10 BogoMIPS
Memory: 15212k available (708k kernel code, 428k data, 36k init)
[c0000000,c1000
000]
DENTRY hash table entries: 262144 (order: 9, 2097152 bytes)
Buffer-cache hash table entries: 32768 (order: 5, 131072 bytes)
Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.2
Based upon Swansea University Computer Society NET3.039
NET4: Unix domain sockets 1.0 for Linux NET4.0.
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
TCP: Hash tables configured (ehash 16384 bhash 16384)
Starting kswapd v 1.5
Serial driver version 4.27 with no serial options enabled
ttyS00 at 0x03f8 (irq = 4) is a 16450
ttyS01 at 0x02f8 (irq = 3) is a 16450
ttyS02 at 0x03e8 (irq = 4) is a 16450
CPM UART driver version 0.02
ttyS00 at 0x0280 is a SMC
ttyS01 at 0x0100 is a SCC
ttyS02 at 0x0200 is a SCC
loop: registered device at major 7
eth0: CPM ENET Version 0.2, 08:00:3e:26:15:59
Sending BOOTP and RARP requests.... OK
IP-Config: Got BOOTP answer from 195.2.106.145, my address is 195.2.106.33
Looking up port of RPC 100003/2 on 195.2.106.145
Looking up port of RPC 100005/1 on 195.2.106.145
VFS: Mounted root (NFS filesystem) readonly.
Freeing unused kernel memory: 36k init
page fault in interrupt handler, addr=333c
NIP: C009402C XER: E000B77F LR: C00941FC REGS: c012d250 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: 00000001 C012D300 C012C000 C00C0000 00008000 00000000 C01DEFFC
7C0803A6
GPR08: 38210010 00000000 C00D0000 FFFFFCEF 55053059 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012D490 00000000
C0002544
GPR24: C0004294 C00D0000 C0132700 C01F32C0 C01EB000 C01EFB40 C01EB144
00009032
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012d110 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012D1C0 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012D100 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012D240 00000000
C0002544
GPR24: C0008D84 C00D0000 C012D1F8 C012C000 C00D0000 00000000 00000000
C012D1C0
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012cfd0 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012D080 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012CFC0 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012D100 00000000
C0002544
GPR24: C0008D84 C00D0000 C012D0B8 C012C000 C00D0000 00000000 00000000
C012D080
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012ce90 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012CF40 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012CE80 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012CFC0 00000000
C0002544
GPR24: C0008D84 C00D0000 C012CF78 C012C000 C00D0000 00000000 00000000
C012CF40
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012cd50 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012CE00 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012CD40 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012CE80 00000000
C0002544
GPR24: C0008D84 C00D0000 C012CE38 C012C000 C00D0000 00000000 00000000
C012CE00
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012cc10 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012CCC0 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012CC00 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012CD40 00000000
C0002544
GPR24: C0008D84 C00D0000 C012CCF8 C012C000 C00D0000 00000000 00000000
C012CCC0
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012cad0 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012CB80 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012CAC0 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012CC00 00000000
C0002544
GPR24: C0008D84 C00D0000 C012CBB8 C012C000 C00D0000 00000000 00000000
C012CB80
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012c990 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012CA40 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012C980 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012CAC0 00000000
C0002544
GPR24: C0008D84 C00D0000 C012CA78 C012C000 C00D0000 00000000 00000000
C012CA40
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012c850 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012C900 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012C840 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012C980 00000000
C0002544
GPR24: C0008D84 C00D0000 C012C938 C012C000 C00D0000 00000000 00000000
C012C900
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012c710 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012C7C0 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012C700 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012C840 00000000
C0002544
GPR24: C0008D84 C00D0000 C012C7F8 C012C000 C00D0000 00000000 00000000
C012C7C0
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012c5d0 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd c01e3000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012C680 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012C5C0 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012C700 00000000
C0002544
GPR24: C0008D84 C00D0000 C012C6B8 C012C000 C00D0000 00000000 00000000
C012C680
Scheduling in interrupt
page fault in interrupt handler, addr=0
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012c490 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd 645d2027 Last syscall: 11
last math 00000000
GPR00: C000C874 C012C540 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012C480 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012C5C0 00000000
C0002544
GPR24: C0008D84 C00D0000 C012C578 C012C000 C00D0000 00000000 00000000
C012C540
Scheduling in interrupt
Kernel stack overflow in process c012c000, r1=c012c400
NIP: C000C874 XER: C000B77F LR: C000C874 REGS: c012c350 TRAP: 0300
MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c012c000[1] 'sh' mm->pgd 00000000 Last syscall: 11
last math 00000000
GPR00: C000C874 C012C400 C012C000 00000018 00000001 00000018 C0135680
C00DE7A3
GPR08: 00000018 00000000 FF002830 C012C340 55053039 00000000 018BBC8C
01800000
GPR16: 018BBC8C C0100AA4 C0100AA0 00000000 00001032 0012C480 00000000
C0002544
GPR24: C0008D84 C00D0000 C012C438 C012C000 C00D0000 00000000 00000000
C012C400
Call backtrace:
C000C874 C000C9F4 C0008E28 C0002544 C000C874 C000C9F4 C0008E28
C0002544 C000C874 C000C9F4 C0008E28 C0002544 C000C874 C000C9F4
C0008E28 C0002544 C000C874 C000C9F4 C0008E28 C0002544 C000C874
C000C9F4 C0008E28 C0002544 C000C874 C000C9F4 C0008E28 C0002544
C000C874 C000C9F4 C0008E28 C0002544 C000C874
Kernel panic: kernel stack overflow
In interrupt handler - not syncing
Rebooting in 180 seconds..

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: crash loadin bash after booting linux on a MPC860ADS

[Marcus Sundberg]

Eisenzopf Thomas <thomas.eisenzopf@siemens.at> writes:

> Hello,
>
> thanks again for the suggestions from some members of this mailing list. I
> managed to reconfigure my kernel and now I can boot linux until the NFS root
> filesystem is mounted.
>
> But after this the kernel tries to load the shell /bin/sh from NFS, at this
> point the system crashes. My kernel includes the patches from
> www.s4l.de/powerpc.html.
>
> Please, can anyone help? I took the ramdisk.image.gz filesystem from
> www.s4l.de/powerpc.html. This should be working for PowerPC(?). On the other
> hand I tried to get my own filesystem (crosscompile bash, ...), but it
> didn´t work. Perhaps someone could support me with a tarball of a filesystem
> working on a MPC860ADS board with NFS root filesystem? How can I make a
> filesystem on my own (on an Intel PC)?
>
>
> 8xxROM 0.3.0
>
> compiletime options:
> board: ADS DRAM_50MHZ
> disk: DISK_ROM
>
> cpu: XPC860xxZPnnA3 at 48 MHz: 4Kbyte icache 4Kbyte dcache
>
> <warning: cpu core has silicon bugs, check the errata>

Well, guess you didn't do this...
Either put your CPU on a hard surface, apply a sledgehammer to it,
and get a new(er) one. ;)
Or apply the following diff and see if things get better:

diff -u -r1.2 -r1.3
--- head.S	2000/01/11 18:13:31	1.2
+++ head.S	2000/01/11 18:27:59	1.3
@@ -883,11 +886,26 @@
  * only perform the attribute functions.
  */
 InstructionTLBMiss:
+#ifndef NO_MPC8xxBUG_CPU6
+	stw	r3, 8(r0)
+	li	r3, M_TW_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
 	mtspr	M_TW, r20	/* Save a couple of working registers */
 	mfcr	r20
 	stw	r20, 0(r0)
 	stw	r21, 4(r0)
 	mfspr	r20, SRR0	/* Get effective address of fault */
+	li	r3, MD_EPN_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#else /* NO_MPC8xxBUG_CPU6 */
+	mtspr	M_TW, r20	/* Save a couple of working registers */
+	mfcr	r20
+	stw	r20, 0(r0)
+	stw	r21, 4(r0)
+	mfspr	r20, SRR0	/* Get effective address of fault */
+#endif /* NO_MPC8xxBUG_CPU6 */
 	mtspr	MD_EPN, r20	/* Have to use MD_EPN for walk, MI_EPN can't */
 	mfspr	r20, M_TWB	/* Get level 1 table entry address */
 	lwz	r21, 0(r20)	/* Get the level 1 entry */
@@ -899,8 +917,19 @@
 	 */
 	tophys(r21,r21,0)
 	ori	r21,r21,1		/* Set valid bit */
+#ifndef NO_MPC8xxBUG_CPU6
+	li	r3, MI_TWC_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+	mtspr	MI_TWC, r21	/* Set page attributes */
+	li	r3, MD_TWC_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+	mtspr	MD_TWC, r21	/* Load pte table base address */
+#else
 	mtspr	MI_TWC, r21	/* Set page attributes */
 	mtspr	MD_TWC, r21	/* Load pte table base address */
+#endif /* NO_MPC8xxBUG_CPU6 */
 	mfspr	r21, MD_TWC	/* ....and get the pte address */
 	lwz	r21, 0(r21)	/* Get the pte */

@@ -920,18 +949,29 @@
 	 */
 	ori	r20, r21, 0x00f0

+#ifndef NO_MPC8xxBUG_CPU6
+	li	r3, MI_RPN_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#endif
 	mtspr	MI_RPN, r20	/* Update TLB entry */

 	mfspr	r20, M_TW	/* Restore registers */
 	lwz	r21, 0(r0)
 	mtcr	r21
 	lwz	r21, 4(r0)
+#ifndef NO_MPC8xxBUG_CPU6
+	lwz	r3, 8(r0)
+#endif
 	rfi

 2:	mfspr	r20, M_TW	/* Restore registers */
 	lwz	r21, 0(r0)
 	mtcr	r21
 	lwz	r21, 4(r0)
+#ifndef NO_MPC8xxBUG_CPU6
+	lwz	r3, 8(r0)
+#endif
 	b	InstructionAccess
 #endif /* CONFIG_8xx */

@@ -1009,6 +1049,12 @@
 	b	00b			/* Try lookup again */
 #endif /* NO_RELOAD_HTAB */
 #else /* CONFIG_8xx */
+#ifndef NO_MPC8xxBUG_CPU6
+	stw	r3, 8(r0)
+	li	r3, M_TW_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#endif
 	mtspr	M_TW, r20	/* Save a couple of working registers */
 	mfcr	r20
 	stw	r20, 0(r0)
@@ -1022,6 +1068,11 @@
 	 */
 	tophys(r21, r21, 0)
 	ori	r21, r21, 1	/* Set valid bit in physical L2 page */
+#ifndef NO_MPC8xxBUG_CPU6
+	li	r3, MD_TWC_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#endif
 	mtspr	MD_TWC, r21	/* Load pte table base address */
 	mfspr	r21, MD_TWC	/* ....and get the pte address */
 	lwz	r21, 0(r21)	/* Get the pte */
@@ -1042,18 +1093,29 @@
 	 */
 	ori	r20, r21, 0x00f0

+#ifndef NO_MPC8xxBUG_CPU6
+	li	r3, MD_RPN_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#endif
 	mtspr	MD_RPN, r20	/* Update TLB entry */

 	mfspr	r20, M_TW	/* Restore registers */
 	lwz	r21, 0(r0)
 	mtcr	r21
 	lwz	r21, 4(r0)
+#ifndef NO_MPC8xxBUG_CPU6
+	lwz	r3, 8(r0)
+#endif
 	rfi

 2:	mfspr	r20, M_TW	/* Restore registers */
 	lwz	r21, 0(r0)
 	mtcr	r21
 	lwz	r21, 4(r0)
+#ifndef NO_MPC8xxBUG_CPU6
+	lwz	r3, 8(r0)
+#endif
 	b	DataAccess
 #endif /* CONFIG_8xx */

@@ -1086,6 +1148,12 @@
  */
 	. = 0x1400
 DataTLBError:
+#ifndef NO_MPC8xxBUG_CPU6
+	stw	r3, 8(r0)
+	li	r3, M_TW_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#endif
 	mtspr	M_TW, r20	/* Save a couple of working registers */
 	mfcr	r20
 	stw	r20, 0(r0)
@@ -1106,6 +1174,11 @@
 	 */
 	tophys(r21, r21, 0)
 	ori	r21, r21, 1		/* Set valid bit in physical L2 page */
+#ifndef NO_MPC8xxBUG_CPU6
+	li	r3, MD_TWC_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#endif
 	mtspr	MD_TWC, r21		/* Load pte table base address */
 	mfspr	r21, MD_TWC		/* ....and get the pte address */
 	lwz	r21, 0(r21)		/* Get the pte */
@@ -1133,18 +1206,29 @@
 	 */
 	ori	r20, r21, 0x00f0

+#ifndef NO_MPC8xxBUG_CPU6
+	li	r3, MD_RPN_ADDR
+	stw	r3, 12(r0)
+	lwz	r3, 12(r0)
+#endif
 	mtspr	MD_RPN, r20	/* Update TLB entry */

 	mfspr	r20, M_TW	/* Restore registers */
 	lwz	r21, 0(r0)
 	mtcr	r21
 	lwz	r21, 4(r0)
+#ifndef NO_MPC8xxBUG_CPU6
+	lwz	r3, 8(r0)
+#endif
 	rfi
 2:
 	mfspr	r20, M_TW	/* Restore registers */
 	lwz	r21, 0(r0)
 	mtcr	r21
 	lwz	r21, 4(r0)
+#ifndef NO_MPC8xxBUG_CPU6
+	lwz	r3, 8(r0)
+#endif
 	b	DataAccess
 #endif /* CONFIG_8xx */

@@ -2214,7 +2307,19 @@
         lwz     r9,MM-TSS(r4)           /* Get virtual address of mm */
         lwz     r9,PGD(r9)              /* get new->mm->pgd */
         addis   r9,r9,-KERNELBASE@h     /* convert to phys addr */
+#ifndef NO_MPC8xxBUG_CPU6
+	lis	r6, cmd_line@h
+	ori	r6, r6, cmd_line@l
+	li	r7, M_TWB_ADDR
+	stw	r7, 12(r6)
+	lwz	r7, 12(r6)
+	mtspr   M_TWB, r9               /* Update MMU base address */
+	li	r7, M_CASID_ADDR
+	stw	r7, 12(r6)
+	lwz	r7, 12(r6)
+#else
         mtspr   M_TWB, r9               /* Update MMU base address */
+#endif /* NO_MPC8xxBUG_CPU6 */
         mtspr   M_CASID, r5             /* Update context */
         tlbia
 #endif


//Marcus
--
Signature under construction, please come back later.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: crash loadin bash after booting linux on a MPC860ADS

[Marcus Sundberg]

Eisenzopf Thomas <thomas.eisenzopf@siemens.at> writes:

> Hello,
>
> thank you for your patches!
>
> I applied them, but unfortunately I get the following error when compiling:
>
> make -C  arch/ppc/kernel
> make[1]: Entering directory `/home/eisenzopft/ppc/tmplinux/arch/ppc/kernel'
> powerpc-linux-gcc -D__KERNEL__ -I/home/eisenzopft/ppc/tmplinux/include -Wall
> -Wstrict-prototypes -O2 -fomit-frame-pointer -fno-strict-aliasing
> -D__powerpc__ -fsigned-char -msoft-float -pipe -fno-builtin -ffixed-r2
> -Wno-uninitialized -mmultiple -mstring -mcpu=860 -I../8xx_io -D__ASSEMBLY__
> -c head.S -o head.o
> head.S: Assembler messages:
> head.S:888: Error: unsupported relocation type
> head.S:896: Error: unsupported relocation type
> head.S:918: Error: unsupported relocation type
> head.S:922: Error: unsupported relocation type
> head.S:950: Error: unsupported relocation type
> head.S:1051: Error: unsupported relocation type
> head.S:1069: Error: unsupported relocation type
> head.S:1094: Error: unsupported relocation type
> head.S:1150: Error: unsupported relocation type
> head.S:1175: Error: unsupported relocation type
> head.S:1207: Error: unsupported relocation type
> head.S:2301: Error: unsupported relocation type
> head.S:2305: Error: unsupported relocation type
> make[1]: *** [head.o] Error 1
> make[1]: Leaving directory `/home/eisenzopft/ppc/tmplinux/arch/ppc/kernel'
> make: *** [_dir_arch/ppc/kernel] Error 2
>
>
> Do you have an idea, what´s wrong? The lines with errors in head.S are:
>
>  888:	li	r3, M_TW_ADDR
>  922:	li	r3, MD_TWC_ADDR
>  950:	li	r3, MI_RPN_ADDR
> 1051:	li	r3, M_TW_ADDR
> ...

Ah, sorry. These are the missing defines (most are not used):

/*
  MPC860* CPU6 workaround defines
*/
#define IMMR_ADDR	0x3d30
#define IC_CST_ADDR	0x2110
#define IC_ADR_ADDR	0x2310
#define IC_DAT_ADDR	0x2510
#define DC_CST_ADDR	0x3110
#define DC_ADR_ADDR	0x3310
#define DC_DAT_ADDR	0x3510
#define MI_CTR_ADDR	0x2180
#define MI_AP_ADDR	0x2580
#define MI_EPN_ADDR	0x2780
#define MI_TWC_ADDR	0x2b80
#define MI_RPN_ADDR	0x2d80
#define MI_DBCAM_ADDR	0x2190
#define MI_DBRAM0_ADDR	0x2390
#define MI_DBRAM1_ADDR	0x2590
#define MD_CTR_ADDR	0x3180
#define M_CASID_ADDR	0x3380
#define MD_AP_ADDR	0x3580
#define MD_EPN_ADDR	0x3780
#define M_TWB_ADDR	0x3980
#define MD_TWC_ADDR	0x3b80
#define MD_RPN_ADDR	0x3d80
#define M_TW_ADDR	0x3f80
#define MD_DBCAM_ADDR	0x3190
#define MD_DBRAM0_ADDR	0x3390
#define MD_DBRAM1_ADDR	0x3590
#define DEC_ADDR	0x2c00
#define TB_ADDR		0x3880
#define TBU_ADDR	0x3a80
#define DPDR_ADDR	0x2d30


Now that I think of it you will also need the following diff:

diff -u -r1.1 -r1.2
--- include/asm-ppc/pgtable.h	2000/01/11 17:53:57	1.1
+++ include/asm-ppc/pgtable.h	2000/01/11 18:44:12	1.2
@@ -8,6 +8,6 @@
 #include <asm/processor.h>		/* For TASK_SIZE */
 #include <asm/mmu.h>
 #include <asm/page.h>

 extern void local_flush_tlb_all(void);
 extern void local_flush_tlb_mm(struct mm_struct *mm);
@@ -230,7 +231,7 @@
  do { \
 	unsigned long __pgdir = (unsigned long)pgdir; \
 	((tsk)->tss.pg_tables = (unsigned long *)(__pgdir)); \
-	asm("mtspr %0,%1 \n\t" : : "i"(M_TWB), "r"(__pa(__pgdir))); \
+	set_m_twb(__pa(__pgdir)); \
  } while (0)
 #endif /* CONFIG_8xx */


Where set_m_twb is defined as:

#  define set_m_twb(val) \
do {	unsigned long dummy_var; \
	register unsigned long reg5 __asm__ ("r5") = M_TWB_ADDR; \
	register unsigned long reg4 __asm__ ("r4") = (unsigned long) &dummy_var; \
	asm volatile ( \
		"stw   %3,0(%2)\n\t" \
		"lwz   %3,0(%2)\n\t" \
		"mtspr %0,%1 \n\t" \
	    : : "i"(M_TWB), "r"((val)), "r"(reg4), "r"(reg5) \
		       : "r4", "r5", "memory"); }while(0)

> As I understood your patches, the define NO_MPC8xxBUG_CPU6 should NOT be
> applied, is this correct?

Yes, that's correct.

//Marcus
--
Signature under construction, please come back later.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

RE: crash loadin bash after booting linux on a MPC860ADS

[Eisenzopf Thomas]

Hello,

many thank´s to Marcus Sundberg!

Your patches and all other tips from the members of this mailing list
finally helped me to get Linux on my ADS board running.

Best regards,
Thomas.


> -----Original Message-----
> From: Marcus Sundberg
> [mailto:erammsu@kieraypc01.p.y.ki.era.ericsson.se]
> Sent: Wednesday, April 05, 2000 11:13 AM
> To: Eisenzopf Thomas
> Cc: linuxppc-embedded@lists.linuxppc.org
> Subject: Re: crash loadin bash after booting linux on a MPC860ADS
>
> Ah, sorry. These are the missing defines (most are not used):
>
> /*
>   MPC860* CPU6 workaround defines
> */
> #define IMMR_ADDR	0x3d30
> #define IC_CST_ADDR	0x2110
> #define IC_ADR_ADDR	0x2310
> #define IC_DAT_ADDR	0x2510
> #define DC_CST_ADDR	0x3110
> #define DC_ADR_ADDR	0x3310
> #define DC_DAT_ADDR	0x3510
> #define MI_CTR_ADDR	0x2180
> #define MI_AP_ADDR	0x2580
> #define MI_EPN_ADDR	0x2780
> #define MI_TWC_ADDR	0x2b80
> #define MI_RPN_ADDR	0x2d80
> #define MI_DBCAM_ADDR	0x2190
> #define MI_DBRAM0_ADDR	0x2390
> #define MI_DBRAM1_ADDR	0x2590
> #define MD_CTR_ADDR	0x3180
> #define M_CASID_ADDR	0x3380
> #define MD_AP_ADDR	0x3580
> #define MD_EPN_ADDR	0x3780
> #define M_TWB_ADDR	0x3980
> #define MD_TWC_ADDR	0x3b80
> #define MD_RPN_ADDR	0x3d80
> #define M_TW_ADDR	0x3f80
> #define MD_DBCAM_ADDR	0x3190
> #define MD_DBRAM0_ADDR	0x3390
> #define MD_DBRAM1_ADDR	0x3590
> #define DEC_ADDR	0x2c00
> #define TB_ADDR		0x3880
> #define TBU_ADDR	0x3a80
> #define DPDR_ADDR	0x2d30
>
>
> Now that I think of it you will also need the following diff:
>
> diff -u -r1.1 -r1.2
> --- include/asm-ppc/pgtable.h	2000/01/11 17:53:57	1.1
> +++ include/asm-ppc/pgtable.h	2000/01/11 18:44:12	1.2
> @@ -8,6 +8,6 @@
>  #include <asm/processor.h>		/* For TASK_SIZE */
>  #include <asm/mmu.h>
>  #include <asm/page.h>
>
>  extern void local_flush_tlb_all(void);
>  extern void local_flush_tlb_mm(struct mm_struct *mm);
> @@ -230,7 +231,7 @@
>   do { \
>  	unsigned long __pgdir = (unsigned long)pgdir; \
>  	((tsk)->tss.pg_tables = (unsigned long *)(__pgdir)); \
> -	asm("mtspr %0,%1 \n\t" : : "i"(M_TWB), "r"(__pa(__pgdir))); \
> +	set_m_twb(__pa(__pgdir)); \
>   } while (0)
>  #endif /* CONFIG_8xx */
>
>
> Where set_m_twb is defined as:
>
> #  define set_m_twb(val) \
> do {	unsigned long dummy_var; \
> 	register unsigned long reg5 __asm__ ("r5") = M_TWB_ADDR; \
> 	register unsigned long reg4 __asm__ ("r4") = (unsigned
> long) &dummy_var; \
> 	asm volatile ( \
> 		"stw   %3,0(%2)\n\t" \
> 		"lwz   %3,0(%2)\n\t" \
> 		"mtspr %0,%1 \n\t" \
> 	    : : "i"(M_TWB), "r"((val)), "r"(reg4), "r"(reg5) \
> 		       : "r4", "r5", "memory"); }while(0)
>
> > As I understood your patches, the define NO_MPC8xxBUG_CPU6
> should NOT be
> > applied, is this correct?
>
> Yes, that's correct.
>
> //Marcus

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

RE: crash loadin bash after booting linux on a MPC860ADS

[t.shantha.laxmi]

Hi,
I was facing similar problem when I tried to load the Linux kernel 2.2.13
into 860ADS- Rev B board. I have put the patches that you have mentioned in
your mails. I am using the bootrom and kernel from the site:
http://www.s4l.de/powerpc.html. I have also put the ADS patches suggested
there. The kernel is crasing with the following messages:

:> mbootz fe00f400
Booting kernel at 0xfe01f400
loaded at:     FE01F400 FE02A5CC
relocated to:  00100000 0010B1CC
board data at: 007F0000 007F001C
relocated to:  00200100 0020011C
zimage at:     FE025400 FE086B01
avail ram:     00201000 01000000

Linux/PPC load:
Uncompressing Linux...done.
Now booting the kernel
Linux version 2.2.13 (root@mickey.india.tek.com) (gcc version 2.95.2
19991024 (r
elease)) #26 Tue May 16 17:40:06 IST 2000
Boot arguments: root=/dev/nfs rw
time_init: decrementer frequency = 180000000/60
Calibrating delay loop... 43.93 BogoMIPS
Memory: 15188k available (716k kernel code, 440k data, 40k init)
[c0000000,c1000
000]
DENTRY hash table entries: 262144 (order: 9, 2097152 bytes)
Buffer-cache hash table entries: 32768 (order: 5, 131072 bytes)
Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.2
Based upon Swansea University Computer Society NET3.039
NET4: Unix domain sockets 1.0 for Linux NET4.0.
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP, IGMP
TCP: Hash tables configured (ehash 16384 bhash 16384)
Initializing RT netlink socket
Starting kswapd v 1.5
Serial driver version 4.27 with no serial options enabled
ttyS00 at 0x03f8 (irq = 4) is a 16450
ttyS01 at 0x02f8 (irq = 3) is a 16450
ttyS02 at 0x03e8 (irq = 4) is a 16450
CPM UART driver version 0.02
ttyS00 at 0x0280 is a SMC
ttyS01 at 0x0100 is a SCC
ttyS02 at 0x0200 is a SCC
pty: 256 Unix98 ptys configured
RAM disk driver initialized:  16 RAM disks of 4096K size
loop: registered device at major 7
eth0: CPM ENET Version 0.2, 00:00:11:01:c4:96
PPP: version 2.3.7 (demand dialling)
TCP compression code copyright 1989 Regents of the University of California
PPP line discipline registered.
IP-Config: Guessing netmask 255.255.255.0
Root-NFS: Mounting /project/downloads/linux/export on server 192.158.104.71
as r
oot
Root-NFS:     rsize = 4096, wsize = 4096, timeo = 7, retrans = 3
Root-NFS:     acreg (min,max) = (3,60), acdir (min,max) = (30,60)
Root-NFS:     nfsd port = -1, mountd port = 0, flags = 00000200
Looking up port of RPC 100003/2 on 192.158.104.71
Root-NFS: Portmapper on server returned 2049 as nfsd port
Looking up port of RPC 100005/1 on 192.158.104.71
Root-NFS: mountd port is 649
NFS:      nfs_mount(c09e6847:/project/downloads/linux/export)
VFS: Mounted root (NFS filesystem).
Freeing unused kernel memory: 40k init
page fault in interrupt handler, addr=c0002578
NIP: C005EE64 XER: 0000B86D LR: C005EE44 REGS: c00c99c0 TRAP: 0300
MSR: 00009032 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c00c7c90[0] 'swapper' mm->pgd c00c6000 Last syscall: 112
last math 00000000
GPR00: C0069248 C00C9A70 C00C7C90 C01EB360 00008000 C00D073C C01D7032
C09E6854
GPR08: C00CAEC0 4C00012B C00CAE8C C00E7BDC 240FF044 00000000 FE000000
FE000000
GPR16: FE000000 FE000000 FE000000 FE000000 00001032 000C9A90 00000000
C0002564
GPR24: C00043F0 C00F2FF8 0000FFFE C00E0000 00000800 C00E7BDC C00D073C
C0002570
NIP: C005EE64 XER: 0000B86D LR: C005EE44 REGS: c00c99c0 TRAP: 0300
MSR: 00009032 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 11
TASK = c00c7c90[0] 'swapper' mm->pgd c00c6000 Last syscall: 112
last math 00000000
GPR00: C0069248 C00C9A70 C00C7C90 C01EB360 00008000 C00D073C C01D7032
C09E6854
GPR08: C00CAEC0 4C00012B C00CAE8C C00E7BDC 240FF044 00000000 FE000000
FE000000
GPR16: FE000000 FE000000 FE000000 FE000000 00001032 000C9A90 00000000
C0002564
GPR24: C00043F0 C00F2FF8 0000FFFE C00E0000 00000800 C00E7BDC C00D073C
C0002570
Call backtrace:
C0014ED0 C00025CC C00178F4 C00044DC C0004508 C00022D8 C00D0000
C00D773C C000221C
Kernel panic: kernel access of bad area pc c005ee64 lr c005ee44 address
C0002578
 tsk swapper/0
In swapper task - not syncing
Rebooting in 180 seconds..

Any help on this would be greatly appreciated.

Thanks in advance,
- Shantha

-> -----Original Message-----
-> From: Marcus Sundberg
-> [mailto:erammsu@kieraypc01.p.y.ki.era.ericsson.se]
-> Sent: Tuesday, April 04, 2000 10:20 PM
-> To: Eisenzopf Thomas
-> Cc: 'linuxppc-embedded@lists.linuxppc.org'
-> Subject: Re: crash loadin bash after booting linux on a MPC860ADS
->
->
->
-> Eisenzopf Thomas <thomas.eisenzopf@siemens.at> writes:
->
-> > Hello,
-> >
-> > thanks again for the suggestions from some members of this
-> mailing list. I
-> > managed to reconfigure my kernel and now I can boot linux
-> until the NFS root
-> > filesystem is mounted.
-> >
-> > But after this the kernel tries to load the shell /bin/sh
-> from NFS, at this
-> > point the system crashes. My kernel includes the patches from
-> > www.s4l.de/powerpc.html.
-> >
-> > Please, can anyone help? I took the ramdisk.image.gz
-> filesystem from
-> > www.s4l.de/powerpc.html. This should be working for
-> PowerPC(?). On the other
-> > hand I tried to get my own filesystem (crosscompile bash,
-> ...), but it
-> > didn´t work. Perhaps someone could support me with a
-> tarball of a filesystem
-> > working on a MPC860ADS board with NFS root filesystem? How
-> can I make a
-> > filesystem on my own (on an Intel PC)?
-> >
-> >
-> > 8xxROM 0.3.0
-> >
-> > compiletime options:
-> > board: ADS DRAM_50MHZ
-> > disk: DISK_ROM
-> >
-> > cpu: XPC860xxZPnnA3 at 48 MHz: 4Kbyte icache 4Kbyte dcache
-> >
-> > <warning: cpu core has silicon bugs, check the errata>
->
-> Well, guess you didn't do this...
-> Either put your CPU on a hard surface, apply a sledgehammer to it,
-> and get a new(er) one. ;)
-> Or apply the following diff and see if things get better:
->
-> diff -u -r1.2 -r1.3
-> --- head.S	2000/01/11 18:13:31	1.2
-> +++ head.S	2000/01/11 18:27:59	1.3
-> @@ -883,11 +886,26 @@
->   * only perform the attribute functions.
->   */
->  InstructionTLBMiss:
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	stw	r3, 8(r0)
-> +	li	r3, M_TW_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
->  	mtspr	M_TW, r20	/* Save a couple of working registers */
->  	mfcr	r20
->  	stw	r20, 0(r0)
->  	stw	r21, 4(r0)
->  	mfspr	r20, SRR0	/* Get effective address of fault */
-> +	li	r3, MD_EPN_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#else /* NO_MPC8xxBUG_CPU6 */
-> +	mtspr	M_TW, r20	/* Save a couple of working registers */
-> +	mfcr	r20
-> +	stw	r20, 0(r0)
-> +	stw	r21, 4(r0)
-> +	mfspr	r20, SRR0	/* Get effective address of fault */
-> +#endif /* NO_MPC8xxBUG_CPU6 */
->  	mtspr	MD_EPN, r20	/* Have to use MD_EPN for walk,
-> MI_EPN can't */
->  	mfspr	r20, M_TWB	/* Get level 1 table entry address */
->  	lwz	r21, 0(r20)	/* Get the level 1 entry */
-> @@ -899,8 +917,19 @@
->  	 */
->  	tophys(r21,r21,0)
->  	ori	r21,r21,1		/* Set valid bit */
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	li	r3, MI_TWC_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +	mtspr	MI_TWC, r21	/* Set page attributes */
-> +	li	r3, MD_TWC_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +	mtspr	MD_TWC, r21	/* Load pte table base address */
-> +#else
->  	mtspr	MI_TWC, r21	/* Set page attributes */
->  	mtspr	MD_TWC, r21	/* Load pte table base address */
-> +#endif /* NO_MPC8xxBUG_CPU6 */
->  	mfspr	r21, MD_TWC	/* ....and get the pte address */
->  	lwz	r21, 0(r21)	/* Get the pte */
->
-> @@ -920,18 +949,29 @@
->  	 */
->  	ori	r20, r21, 0x00f0
->
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	li	r3, MI_RPN_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#endif
->  	mtspr	MI_RPN, r20	/* Update TLB entry */
->
->  	mfspr	r20, M_TW	/* Restore registers */
->  	lwz	r21, 0(r0)
->  	mtcr	r21
->  	lwz	r21, 4(r0)
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	lwz	r3, 8(r0)
-> +#endif
->  	rfi
->
->  2:	mfspr	r20, M_TW	/* Restore registers */
->  	lwz	r21, 0(r0)
->  	mtcr	r21
->  	lwz	r21, 4(r0)
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	lwz	r3, 8(r0)
-> +#endif
->  	b	InstructionAccess
->  #endif /* CONFIG_8xx */
->
-> @@ -1009,6 +1049,12 @@
->  	b	00b			/* Try lookup again */
->  #endif /* NO_RELOAD_HTAB */
->  #else /* CONFIG_8xx */
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	stw	r3, 8(r0)
-> +	li	r3, M_TW_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#endif
->  	mtspr	M_TW, r20	/* Save a couple of working registers */
->  	mfcr	r20
->  	stw	r20, 0(r0)
-> @@ -1022,6 +1068,11 @@
->  	 */
->  	tophys(r21, r21, 0)
->  	ori	r21, r21, 1	/* Set valid bit in physical L2 page */
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	li	r3, MD_TWC_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#endif
->  	mtspr	MD_TWC, r21	/* Load pte table base address */
->  	mfspr	r21, MD_TWC	/* ....and get the pte address */
->  	lwz	r21, 0(r21)	/* Get the pte */
-> @@ -1042,18 +1093,29 @@
->  	 */
->  	ori	r20, r21, 0x00f0
->
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	li	r3, MD_RPN_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#endif
->  	mtspr	MD_RPN, r20	/* Update TLB entry */
->
->  	mfspr	r20, M_TW	/* Restore registers */
->  	lwz	r21, 0(r0)
->  	mtcr	r21
->  	lwz	r21, 4(r0)
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	lwz	r3, 8(r0)
-> +#endif
->  	rfi
->
->  2:	mfspr	r20, M_TW	/* Restore registers */
->  	lwz	r21, 0(r0)
->  	mtcr	r21
->  	lwz	r21, 4(r0)
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	lwz	r3, 8(r0)
-> +#endif
->  	b	DataAccess
->  #endif /* CONFIG_8xx */
->
-> @@ -1086,6 +1148,12 @@
->   */
->  	. = 0x1400
->  DataTLBError:
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	stw	r3, 8(r0)
-> +	li	r3, M_TW_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#endif
->  	mtspr	M_TW, r20	/* Save a couple of working registers */
->  	mfcr	r20
->  	stw	r20, 0(r0)
-> @@ -1106,6 +1174,11 @@
->  	 */
->  	tophys(r21, r21, 0)
->  	ori	r21, r21, 1		/* Set valid bit in
-> physical L2 page */
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	li	r3, MD_TWC_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#endif
->  	mtspr	MD_TWC, r21		/* Load pte table base
-> address */
->  	mfspr	r21, MD_TWC		/* ....and get the pte
-> address */
->  	lwz	r21, 0(r21)		/* Get the pte */
-> @@ -1133,18 +1206,29 @@
->  	 */
->  	ori	r20, r21, 0x00f0
->
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	li	r3, MD_RPN_ADDR
-> +	stw	r3, 12(r0)
-> +	lwz	r3, 12(r0)
-> +#endif
->  	mtspr	MD_RPN, r20	/* Update TLB entry */
->
->  	mfspr	r20, M_TW	/* Restore registers */
->  	lwz	r21, 0(r0)
->  	mtcr	r21
->  	lwz	r21, 4(r0)
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	lwz	r3, 8(r0)
-> +#endif
->  	rfi
->  2:
->  	mfspr	r20, M_TW	/* Restore registers */
->  	lwz	r21, 0(r0)
->  	mtcr	r21
->  	lwz	r21, 4(r0)
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	lwz	r3, 8(r0)
-> +#endif
->  	b	DataAccess
->  #endif /* CONFIG_8xx */
->
-> @@ -2214,7 +2307,19 @@
->          lwz     r9,MM-TSS(r4)           /* Get virtual
-> address of mm */
->          lwz     r9,PGD(r9)              /* get new->mm->pgd */
->          addis   r9,r9,-KERNELBASE@h     /* convert to phys addr */
-> +#ifndef NO_MPC8xxBUG_CPU6
-> +	lis	r6, cmd_line@h
-> +	ori	r6, r6, cmd_line@l
-> +	li	r7, M_TWB_ADDR
-> +	stw	r7, 12(r6)
-> +	lwz	r7, 12(r6)
-> +	mtspr   M_TWB, r9               /* Update MMU base address */
-> +	li	r7, M_CASID_ADDR
-> +	stw	r7, 12(r6)
-> +	lwz	r7, 12(r6)
-> +#else
->          mtspr   M_TWB, r9               /* Update MMU base
-> address */
-> +#endif /* NO_MPC8xxBUG_CPU6 */
->          mtspr   M_CASID, r5             /* Update context */
->          tlbia
->  #endif
->
->
-> //Marcus
-> --
-> Signature under construction, please come back later.
->
-> ** Sent via the linuxppc-embedded mail list. See
-> http://lists.linuxppc.org/
->

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: crash loadin bash after booting linux on a MPC860ADS

[Graham Stoney]

t.shantha.laxmi@exgate.tek.com writes:
> page fault in interrupt handler, addr=c0002578
> NIP: C005EE64 XER: 0000B86D LR: C005EE44 REGS: c00c99c0 TRAP: 0300
...
> Kernel panic: kernel access of bad area pc c005ee64 lr c005ee44 address
> C0002578

Looks like one of your interrupt handlers is causing a page fault. Disassemble
your vmlinux with objdump --disassemble, and find the instruction at C005EE64.
It's the one causing the fault.

By the way, do any other list members know of any references on the 'net that
give some PowerPC-specific tips to decoding oops messages?  If I can find
something more applicable than Documentation/oops-tracing.txt, I'd like to
include a link to it in the HOWTO.

Regards,
Graham

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: crash loadin bash after booting linux on a MPC860ADS

[Wolfgang Denk]

[-- Attachment #1: Type: text/plain, Size: 2125 bytes --]

In message <20000516235553.C15D13C962@elph.research.canon.com.au>
Graham Stoney wrote:
>
> By the way, do any other list members know of any references on the 'net that
> give some PowerPC-specific tips to decoding oops messages?  If I can find
> something more applicable than Documentation/oops-tracing.txt, I'd like to
> include a link to it in the HOWTO.

Usually I'm using the little script  attached  below;  it  loads  the
kernel symbols from /LinuxPPC/usr/src/linux/System.map, or, if a file
name argument is given, from that file.

Feed it the "Call backtrace" messages on stdin:

	-> /backtrace System.map
	Reading symbols from System.map
	C0745300 C003255C C002FDD4 C002FE78 C00361E8 C00AD924 C006BDC8
	C006C814 C006C95C C006C9E8 C006CF00 C00ADA8C C00AD41C C00AD7FC
	C00AC5A0 C00A87E0 C00A8878 C0002670 C00075F4

and you will get:

	0xc0745300 -- 0xc00aeae8 + 0x696818   skb_init
	0xc003255c -- 0xc00324e8 + 0x0074   wakeup_bdflush
	0xc002fdd4 -- 0xc002fdb8 + 0x001c   balance_dirty
	0xc002fe78 -- 0xc002fe58 + 0x0020   mark_buffer_dirty
	0xc00361e8 -- 0xc0035dc0 + 0x0428   block_write
	0xc00ad924 -- 0xc00ad8e0 + 0x0044   flush_window
	0xc006bdc8 -- 0xc006b930 + 0x0498   inflate_codes
	0xc006c814 -- 0xc006c184 + 0x0690   inflate_dynamic
	0xc006c95c -- 0xc006c84c + 0x0110   inflate_block
	0xc006c9e8 -- 0xc006c998 + 0x0050   inflate
	0xc006cf00 -- 0xc006cb3c + 0x03c4   gunzip
	0xc00ada8c -- 0xc00ad9e0 + 0x00ac   crd_load
	0xc00ad41c -- 0xc00ad2a8 + 0x0174   rd_load_image
	0xc00ad7fc -- 0xc00ad7dc + 0x0020   initrd_load
	0xc00ac5a0 -- 0xc00ac56c + 0x0034   partition_setup
	0xc00a87e0 -- 0xc00a87b0 + 0x0030   do_initcalls
	0xc00a8878 -- 0xc00a87fc + 0x007c   do_basic_setup
	0xc0002670 -- 0xc000265c + 0x0014   init
	0xc00075f4 -- 0xc00075c8 + 0x002c   kernel_thread

Not perfect, but better than nothing.

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
Life would be so much easier if we could  just  look  at  the  source
code.                                                   -- Dave Olson


[-- Attachment #2: backtrace --]
[-- Type: text/plain , Size: 955 bytes --]

#!/usr/bin/perl -w

my $mapfile = shift || '/LinuxPPC/usr/src/linux/System.map';

print STDERR "Reading symbols from $mapfile\n";

#
# Read symbol table
#
open (MAP, $mapfile) or die "Can't open $mapfile: $!\n";

my $cnt = 0;

while (<MAP>) {
	chomp;
	my ($a,$t,$n) = split;
	$a = eval ('0x' . $a);
	if ($t =~ /^t$/i) {
		$addr[$cnt] = $a;
		$name[$cnt] = $n;
		++$cnt;
	}
}
close MAP;

my ($i, $n, $last);

#for ($i=0; $i<$cnt; ++$i) {
#	printf "0x%08x  %s\n", $addr[$i], $name[$i];
#}

#
# Now get backtrace info from stdin
#

while (<>) {
	chomp;
	my @a = split;
	my $aa;

	for ($i=0; $i<=$#a; ++$i) {
		$aa = eval ('0x' . $a[$i]);

		$last = -1;
		for ($n=0; $n<$cnt; ++$n) {
			if ($addr[$n] > $aa) {
				last;
			}
			$last = $n;
		}

		if ($last) {
			my $offset = $aa - $addr[$last];

			printf "0x%08x -- 0x%08x + 0x%04x   %s\n",
				$aa, $addr[$last], $offset, $name[$last];
		} else {
			printf "0x%08x -- unknown address\n", $i, $aa;
		}
	}
}