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From: Samuel Rydh <samuel@ibrium.se>
To: linuxppc-dev@lists.linuxppc.org
Subject: Re: I-cache flushing on the 7400
Date: Sat, 31 Mar 2001 20:15:50 +0200	[thread overview]
Message-ID: <20010331201550.A20735@ibrium.se> (raw)
In-Reply-To: <Pine.HPX.4.10.10103311944390.18988-100000@gra-ux1.iram.es>; from paubert@iram.es on Sat, Mar 31, 2001 at 07:51:55PM +0200


On Sat, Mar 31, 2001 at 07:51:55PM +0200, Gabriel Paubert wrote:

> > 	LI_PHYS( r2,split_store_patch )
> > 	stw     r4,0(r2)			// store instruction
> > 	dcbst   0,r2				// Flush cache
> > 	sync
> > 	icbi    0,r2
> > 	isync
> >
> > 	.... some instructions and then a rfi to split_store_patch ....
> > 	rfi
> >
> > split_store_patch:
> > 	nop
> >
>
> It should, while actually the isync does not seem necessary since rfi
> is a context synchronizing instruction (rfi and sc include implicitly the
> equivalent of an isync).

Yes, but in this case the rfi instruction is within the same cache-line
as the nop. I think I need the extra isync to make sure the cache
line in question is not touched before the invalidation is completed.

/Samuel


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  reply	other threads:[~2001-03-31 18:15 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2001-03-31 13:30 I-cache flushing on the 7400 Samuel Rydh
2001-03-31 17:07 ` Benjamin Herrenschmidt
2001-03-31 17:51 ` Gabriel Paubert
2001-03-31 18:15   ` Samuel Rydh [this message]
2001-03-31 19:26     ` Gabriel Paubert

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