fetch_and_add() available on PPC Linux?

fetch_and_add() available on PPC Linux?

[rayson_ho]

I am porting a threads library to PPC Linux... Since some applications depend on it, I can't easily switch to pthreads.

The library uses fetch_and_add(), which is available on AIX. I tried to compile it on PPC Linux, but failed to link.

I compiled the code on AIX with -S. Then I examined the assembly listing, and found that fetch_and_add() is a lib/OS call.

I would like to know if PPC Linux has something similar to fetch_and_add() on AIX, if not, are there any workarounds??

Thanks,
Rayson



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Re: fetch_and_add() available on PPC Linux?

[David Edelsohn]

	Have you looked at the atomicity macros for PowerPC in glibc?  You
want to use the load-linked store-conditional instructions.  Something
along the lines of:

0:
    lwarx   %1,0,%4         # oval = (*ptr) [linked]
    add%I3  %2,%1,%3        # tmp = oval + val
    stwcx.  %2,0,%4         # (*ptr) = tmp  [conditional]
    bne-    0b              # if (store failed) retry

David

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Re: fetch_and_add() available on PPC Linux?

[Michael R. Zucca]

At 11:17 PM -0500 12/5/01, David Edelsohn wrote:

>0:
>    lwarx   %1,0,%4         # oval = (*ptr) [linked]
>    add%I3  %2,%1,%3        # tmp = oval + val
>    stwcx.  %2,0,%4         # (*ptr) = tmp  [conditional]
>    bne-    0b              # if (store failed) retry

The only caveat is that the ptr to any two of these items must be in
individual lock granules. If the software has an array of locks that are
just a bunch of long-words, there's going to be difficultly. However, given
that this was an AIX box, and was probably a POWER machine, it's likely
that the POWER machine has the same lock granule restriction.

See the PPC manual for the lock granule size. I forget what it is off the
top of my head.

____________________________________________________________________
 Michael Zucca - mrz5149@acm.org
 "I will choose a path that's clear. I will choose Freewill. "
  --Rush, Freewill
____________________________________________________________________


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Re: fetch_and_add() available on PPC Linux?

[Holger Bettag]

"Michael R. Zucca" <mrz5149@acm.org> writes:

[...]
> The only caveat is that the ptr to any two of these items must be in
> individual lock granules. If the software has an array of locks that are
> just a bunch of long-words, there's going to be difficultly. However, given
> that this was an AIX box, and was probably a POWER machine, it's likely
> that the POWER machine has the same lock granule restriction.
>
> See the PPC manual for the lock granule size. I forget what it is off the
> top of my head.
>
It is architected to be one cache block. On the 'desktop' PowerPCs (6xx, 7xx,
7xxx) that currently means 32 bytes. Some embedded models (4xx, 5xx?) have
cache blocks of 16 bytes.

  Holger


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Re: fetch_and_add() available on PPC Linux?Hi,

[Kevin B. Hendricks]

Hi,

> See the PPC manual for the lock granule size. I forget what it is off
> the top of my head.

I think it is the same as the cache line size (32 bytes for most ppc
machines but defintely that cache line size changes for some
implementations (so go with at least 32 bytes and you should be safe).

Kevin

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Re: fetch_and_add() available on PPC Linux?Hi,

[Wolfgang Denk]

In message <20011206140445.TQHJ17034.tomts10-srv.bellnexxia.net@there> you wrote:
>
> I think it is the same as the cache line size (32 bytes for most ppc
> machines but defintely that cache line size changes for some
> implementations (so go with at least 32 bytes and you should be safe).

...except on embedded CPUs like MPC8xx which have a cache  line  size
of only 16 bytes

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
"I've finally learned what `upward compatible' means. It means we get
to keep all our old mistakes." - Dennie van Tassel

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Re: fetch_and_add() available on PPC Linux?Hi,

[Kevin B. Hendricks]

Hi,

On December 6, 2001 10:00, Wolfgang Denk wrote:
> In message <20011206140445.TQHJ17034.tomts10-srv.bellnexxia.net@there>
you wrote:
> > I think it is the same as the cache line size (32 bytes for most ppc
> > machines but defintely that cache line size changes for some
> > implementations (so go with at least 32 bytes and you should be safe).
>
> ...except on embedded CPUs like MPC8xx which have a cache  line  size
> of only 16 bytes

So 32 bytes apart is fine.  That will make it two cache line sizes on your
machine so that more than meets the min lock granularity.

Kevin

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