From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Holger Bettag <hobold@Informatik.Uni-Bremen.DE>
Cc: Robert E Brose II <bob@kunk.jriver.com>,
<linuxppc-dev@lists.linuxppc.org>
Subject: Re: Dual G3's in Umax S900?
Date: Thu, 2 May 2002 15:14:39 +0200 [thread overview]
Message-ID: <20020502131439.13109@smtp.adsl.oleane.com> (raw)
In-Reply-To: <8x1ycu1yp4.fsf@olof.informatik.uni-bremen.de>
>> No. Doing SMP with G3s is a terrible nightmare as those CPUs don't
>> have the necessary coherency protocols.
>>
>Is MEI not enough for Linux? Instruction cache coherency problems? Or is it
>because of the rudimentary implementation of tlbie/tlbia? Just curious.
I don't have all in mind, from memory, the lack of bus broadcast for tlbie
is one, the lack of bus coherency for cache inval is another, but I am not
sure.
I think in the past, we used to have BeBox (dual 603) working, which I suppose
is pretty similar, but still hell. No way I support that for pmac kernels.
Ben.
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2002-05-02 13:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-05-02 4:44 Dual G3's in Umax S900? Robert E Brose II
2002-05-02 8:17 ` Benjamin Herrenschmidt
2002-05-02 13:11 ` Holger Bettag
2002-05-02 13:14 ` Benjamin Herrenschmidt [this message]
2002-05-02 15:34 ` Robert E Brose II
2002-05-02 16:14 ` Cort Dougan
2002-05-02 16:46 ` Benjamin Herrenschmidt
2002-05-02 16:12 ` Cort Dougan
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