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From: Miku Jha <jha_miku@yahoo.com>
To: linuxppc-embedded@lists.linuxppc.org
Subject: ppc440 and i2c
Date: Mon, 17 Nov 2003 23:18:29 -0800 (PST)	[thread overview]
Message-ID: <20031118071829.43116.qmail@web40301.mail.yahoo.com> (raw)


Hi,
I am running ppc440 with linux kernel version 2.4

If I reboot the ppc440 in middle of a read transaction
from a slave say( at the 3rd clock pulse for example)
then somehow ppc440 is hung.

Basically when it comes up it sees that data line
held low.
How does the powerpc deal with this situation.?

>From the i2c bus trace it looks like in this
situation ppc440 keeps issuing the clock pulses
until the data line SDL is released by the slave
but following that the SCL line is held low
by ppc440 and is never released or set to IDLE?

Is this the expected behaviour if the SDL is held
low when the ppc440 comes up.
Is there anyway I can fix this in the ppcboot code.

Please let me know.
Any help appreciated.

Thanks a bunch


=====
mailto:jha_miku@yahoo.com


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

             reply	other threads:[~2003-11-18  7:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-11-18  7:18 Miku Jha [this message]
2003-11-18  8:08 ` ppc440 and i2c Eugene Surovegin
2003-11-18  8:22   ` Wolfgang Denk
2003-11-18  8:42     ` Eugene Surovegin
2003-11-18  8:55     ` Robert Berger
2003-11-18  8:09 ` Wolfgang Denk

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