Re: multiple separate pci bridges ...

[Rob Baxter <robb@synergymicro.com>]

On Wed, Jan 07, 2004 at 08:37:36AM +1100, Benjamin Herrenschmidt wrote:
>
> > Here's the code from our pcibios_fixup:
> >
> > 	dev = NULL;
> > 	while ((dev = pci_find_device(PCI_VENDOR_ID_GALILEO,
> > 				PCI_DEVICE_ID_GALILEO_GT64260, dev))) {
> > 		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
> > 			dev->resource[i].flags = 0;
> > 			dev->resource[i].start = 0;
> > 			dev->resource[i].end = 0;
> > 		}
> > 	}
>
> pcibios_fixup isn't the right place to do that ;) You should do this
> from a pci quirk imho.

agreed

>
> note that there's still a problem with XFree which will "see"  those
> BARs and, according to the log posted by Sven, shoke. Sven, can you
> try "hiding" the host bridge completely from the config ops and see
> if that helps with XFree ? That's not a very good solution though,
> we'll have to do something different about it. Now if only XFree
> stopped mucking with the PCI bus...

I have no problem with XFree working with a CT69030 (chips_drv.o) PMC
graphics card and an USB keyboard and mouse setup.

>
> > > BTW, is there any reason the L2 cache is disabled by default in the
> > > 2.4.x kernels ?
> >
> > We have it initialized and enabled.
>
> The kernel doesn't do anything to the L2 cache, it all depends what
> you firmware does to it.

That's true, but for the ppc stuff, there is initialization routines within
the kernel source.

>
> Ben.
>
>

--
-Rob

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