Internal Address multiplexing for MCP852

Internal Address multiplexing for MCP852

[Estevam Fabio-R49496]

Hi,

I am using Embedded Planet´s EP852T board and there are 2 MT48LC4M16 SDRAMs in this board .

The .../ppcboot/u-boot-1.0.0x/board/ep852/ep852.c file has the 852 UPM initialization routine and it is configured not to use the address multiplexing capability of the 852. It uses an external address multiplexer chip instead.

I would like to remove the external multiplexer chip and connect the 852 address lines directly  to the SDRAMs  without using a multiplexer.

I know that I will have to set the SAM bit in the SDRAM_OR1VALUE register and also the AMX bits in the UPM RAM words of the const uint sdram table[] array.

Please let me know if someone has already done that setting and would like to share it with me.

Thanks,

Fabio Estevam

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RE: Internal Address multiplexing for MCP852

[Meriin Michael-BMM063]

[-- Attachment #1: Type: text/plain, Size: 991 bytes --]

I hope you are using U-boot as a bootloader.
So just try this SDRAM init (see attachment).
Good luck!

Best Regards,
     Michael Meriin

-----Original Message-----
From: Estevam Fabio-R49496
Sent: Friday, May 28, 2004 21:06
Subject: Internal Address multiplexing for MCP852

I am using Embedded Planet's EP852T board and there are 2 MT48LC4M16
SDRAMs in this board .

The .../ppcboot/u-boot-1.0.0x/board/ep852/ep852.c file has the 852 UPM
initialization routine and it is configured not to use the address
multiplexing capability of the 852. It uses an external address
multiplexer chip instead.

I would like to remove the external multiplexer chip and connect the 852
address lines directly to the SDRAMs without using a multiplexer.

I know that I will have to set the SAM bit in the SDRAM_OR1VALUE
register and also the AMX bits in the UPM RAM words of the const uint
sdram table[] array.

Please let me know if someone has already done that setting and would
like to share it with me.

[-- Attachment #2: RPXClassic.c --]
[-- Type: application/octet-stream, Size: 6942 bytes --]

/*
 * (C)	Copyright 2001
 * Stäubli Faverges - <www.staubli.com>
 * Pierre AUBERT  p.aubert@staubli.com
 * U-Boot port on RPXClassic LF (CLLF_BW31) board
 *
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <i2c.h>
#include <config.h>
#include <mpc8xx.h>

/* ------------------------------------------------------------------------- */

static long int dram_size (long int, long int *, long int);
static unsigned char aschex_to_byte (unsigned char *cp);

/* ------------------------------------------------------------------------- */

#define _NOT_USED_	0xFFFFCC05

const uint sdram_table[] =
{
	/*
	 * Single Read. (Offset 00h in UPMA RAM)
	 */
	0xEFCBCC04, 0x0F37C804, 0x0EEEC004, 0x01B98404,
	0x1FF74C00, /* last */
	_NOT_USED_, _NOT_USED_, _NOT_USED_,

	/*
	 * Burst Read. (Offset 08h in UPMA RAM)
	 */
	0xEFCBCC04, 0x0F37C804, 0x0EEEC004, 0x00BDC404,
	0x00FFCC00, 0x00FFCC00, 0x01FB8C00, 0x1FF74C00, /* last */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,

	/*
	 * Single Write. (Offset 18h in UPMA RAM)
	 */
	0xEFCBCC04, 0x0F37C804, 0x0EEE8002, 0x01B90404,
	0x1FF74C05, /* last */
	_NOT_USED_, _NOT_USED_, _NOT_USED_,

	/*
	 * Burst Write. (Offset 20h in UPMA RAM)
	 */
	0xEFCBCC04, 0x0F37C804, 0x0EEE8000, 0x00BD4400,
	0x00FFCC00, 0x00FFCC02, 0x01FB8C04, 0x1FF74C05, /* last */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,

	/*
	 * Refresh. (Offset 30h in UPMA RAM)
	 */
	0xEFFACC04, 0x0FF5CC04, 0x0FFFCC04, 0x1FFFCC04,
	0xFFFFCC05, 0xFFFFCC05, 0xEFFB8C34, 0x0FF74C34,
	0x0FFACCB4, 0x0FF5CC34, 0x0FFFC034, 0x0FFFC0B4,

	/*
	 * Exception. (Offset 3Ch in UPMA RAM)
	 */
	0x0FEA8034, 0x1FB54034, 0xFFFFCC34, _NOT_USED_
};

/* ------------------------------------------------------------------------- */


/*
 * Check Board Identity:
 */

int checkboard (void)
{
#ifdef EP_852
	puts ("Board: EP_852\n");
#else
	puts ("Board: RPXClassic\n");
#endif
	return (0);
}

/*-----------------------------------------------------------------------------
 * board_get_enetaddr -- Read the MAC Address in the I2C EEPROM
 *-----------------------------------------------------------------------------
 */
void board_get_enetaddr (uchar * enet)
{
	int i;
	char buff[256], *cp;
#ifndef EP_852
	/* Initialize I2C					*/
	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);

	/* Read 256 bytes in EEPROM				*/
	i2c_read (0x54, 0, 1, buff, 128);
	i2c_read (0x54, 128, 1, buff + 128, 128);
#else /*EP_852 defined*/
	int n, j;
	ulong len;
	unsigned off=0;
	char spi_buf[16];
	char * cpy_buff = buff;

	for (j=0,len = 0,n = sizeof(spi_buf); len<CFG_ENV_SIZE; j++,off+=n)
	{
		len = len + n - 3;

		eeprom_read (CFG_DEF_EEPROM_ADDR, CFG_ENV_OFFSET+off-3*j, spi_buf, n);

		memcpy( cpy_buff, spi_buf, n-3);
		cpy_buff+=(n-3);
	}
#endif /*EP_852 defined*/
	/* Retrieve MAC address in buffer (key EA)		*/
	for (cp = buff;;) {
		if (cp[0] == 'E' && cp[1] == 'A') {
			cp += 3;
			/* Read MAC address			*/
			for (i = 0; i < 6; i++, cp += 2) {
				enet[i] = aschex_to_byte (cp);
			}
		}
		/* Scan to the end of the record		*/
		while ((*cp != '\n') && (*cp != (char)0xff)) {
			cp++;
		}
		/* If the next character is a \n, 0 or ff, we are done.	*/
		cp++;
		if ((*cp == '\n') || (*cp == 0) || (*cp == (char)0xff))
			break;
	}

#ifdef CONFIG_FEC_ENET
	/* The MAC address is the same as normal ethernet except the 3rd byte	 */
	/* (See the E.P. Planet Core Overview manual		*/
	enet[3] |= 0x80;
#endif
	printf ("MAC address = %02x:%02x:%02x:%02x:%02x:%02x\n",
		enet[0], enet[1], enet[2], enet[3], enet[4], enet[5]);

}

void rpxclassic_init (void)
{
	/* Enable NVRAM */
	*((uchar *) BCSR0) |= BCSR0_ENNVRAM;

#ifdef CONFIG_FEC_ENET

	/* Validate the fast ethernet tranceiver                             */
	*((volatile uchar *) BCSR2) &= ~BCSR2_MIICTL;
	*((volatile uchar *) BCSR2) &= ~BCSR2_MIIPWRDWN;
	*((volatile uchar *) BCSR2) |= BCSR2_MIIRST;
	*((volatile uchar *) BCSR2) |= BCSR2_MIIPWRDWN;
#endif

}

/* ------------------------------------------------------------------------- */

long int initdram (int board_type)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	volatile memctl8xx_t *memctl = &immap->im_memctl;
	long int size10;

	upmconfig (UPMA, (uint *) sdram_table,
			   sizeof (sdram_table) / sizeof (uint));

	memctl->memc_mar = 0x00000088;

	/* Refresh clock prescalar */
	memctl->memc_mptpr = CFG_MPTPR;

	memctl->memc_mamr = CFG_MAMR_10COL;

	/* Map controller banks 1 to the SDRAM bank */
	memctl->memc_or1 = CFG_OR1_PRELIM;
	memctl->memc_br1 = CFG_BR1_PRELIM;

	memctl->memc_mcr = 0x80002236;

	udelay (1000);

	/* Check Bank 0 Memory Size
	 * try 10 column mode
	 */

	size10 = dram_size (CFG_MAMR_10COL, (ulong *) SDRAM_BASE_PRELIM,
						SDRAM_MAX_SIZE);

	return (size10);
}

/* ------------------------------------------------------------------------- */

/*
 * Check memory range for valid RAM. A simple memory test determines
 * the actually available RAM size between addresses `base' and
 * `base + maxsize'. Some (not all) hardware errors are detected:
 * - short between address lines
 * - short between data lines
 */

static long int dram_size (long int mamr_value, long int *base, long int maxsize)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	volatile memctl8xx_t *memctl = &immap->im_memctl;

	memctl->memc_mamr = mamr_value;

	return (get_ram_size(base, maxsize));
}
/*-----------------------------------------------------------------------------
 * aschex_to_byte --
 *-----------------------------------------------------------------------------
 */
static unsigned char aschex_to_byte (unsigned char *cp)
{
	u_char byte, c;

	c = *cp++;

	if ((c >= 'A') && (c <= 'F')) {
		c -= 'A';
		c += 10;
	} else if ((c >= 'a') && (c <= 'f')) {
		c -= 'a';
		c += 10;
	} else {
		c -= '0';
	}

	byte = c * 16;

	c = *cp;

	if ((c >= 'A') && (c <= 'F')) {
		c -= 'A';
		c += 10;
	} else if ((c >= 'a') && (c <= 'f')) {
		c -= 'a';
		c += 10;
	} else {
		c -= '0';
	}

	byte += c;

	return (byte);
}

Re: Internal Address multiplexing for MCP852

[Wolfgang Denk]

In message <0F48024310E5D6118D200002B3A440DB08B07A15@zil01exm08.mcil.comm.mot.com> you wrote:
>
> I hope you are using U-boot as a bootloader.
> So just try this SDRAM init (see attachment).

Seemes you removed some code, including the write to the  mamr  which
enables  the  refresh? The while init sequence seams a bit simplified
to me - are you sure about this?

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
I mean, I . . . think to understand you, I just don't know  what  you
are saying ...                        - Terry Pratchett, _Soul Music_

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Re: Internal Address multiplexing for MCP852

[Wolfgang Denk]

In message <0F48024310E5D6118D200002B3A440DB08B07A20@zil01exm08.mcil.comm.mot.com> you wrote:
> It is original code from u-boot-1.1.0,

...which means it's obsolete.


Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
"The algorithm to do that is extremely nasty. You might want  to  mug
someone with it."                   - M. Devine, Computer Science 340

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