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From: Eugene Surovegin <ebs@ebshome.net>
To: "Barbier, Renaud (GE Infrastructure)" <Renaud.Barbier@ge.com>
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: 440GX interrupt
Date: Thu, 17 Feb 2005 15:36:05 -0800	[thread overview]
Message-ID: <20050217233605.GA10915@gate.ebshome.net> (raw)
In-Reply-To: <20050217225414.GA32623@gate.ebshome.net>

On Thu, Feb 17, 2005 at 02:54:14PM -0800, Eugene Surovegin wrote:
> Probably it's a race which cannot be avoided anyway because external 
> IRQs are completely async, and your version of ppc4xx_pic.c just has a 
> bug. I'll think about it a little more.

Uhh, yes, I think it's a bug in 4xx version of disable_irq.

We have to ACK parent UIC after disabling IRQ to prevent false 
triggering in case this IRQ was already pending during disable_irq 
call.

Here is a patch against current 2.6, so you can get an idea what I'm 
talking about :):

===== arch/ppc/syslib/ppc4xx_pic.c 1.13 vs edited =====
--- 1.13/arch/ppc/syslib/ppc4xx_pic.c	2005-01-03 15:49:19 -08:00
+++ edited/arch/ppc/syslib/ppc4xx_pic.c	2005-02-17 15:31:07 -08:00
@@ -48,6 +48,7 @@
 {									\
 	ppc_cached_irq_mask[n] &= ~IRQ_MASK_UIC##n(irq);		\
 	mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]);		\
+	ACK_UIC##n##_PARENT						\
 }									\
 									\
 static void ppc4xx_uic##n##_ack(unsigned int irq)			\


You can send me your version of ppc4xx_pic.c or put it somewhere on 
www and I'll make a patch for it.

--
Eugene

  reply	other threads:[~2005-02-17 23:36 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-02-17 21:50 440GX interrupt Barbier, Renaud (GE Infrastructure)
2005-02-17 22:54 ` Eugene Surovegin
2005-02-17 23:36   ` Eugene Surovegin [this message]
2005-02-18 15:56     ` Matt Porter

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