From: Tom Rini <trini@kernel.crashing.org>
To: James Chapman <jchapman@katalix.com>
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: PATCH: add mv64x60 GPP IO pin/IRQ register definitions
Date: Wed, 23 Feb 2005 15:26:38 -0700 [thread overview]
Message-ID: <20050223222637.GN345@smtp.west.cox.net> (raw)
In-Reply-To: <421CEEA2.2080308@katalix.com>
On Wed, Feb 23, 2005 at 08:59:14PM +0000, James Chapman wrote:
> Add mv64x60 GPP IO pin/IRQ register definitions
[snip]
> #define MV64x60_IRQ_TIMER_6_7 11
> +#define MV64x60_IRQ_P1_GPP_0_7 24
Please use consistent spacing. Thanks.
--
Tom Rini
http://gate.crashing.org/~trini/
next prev parent reply other threads:[~2005-02-23 22:26 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-02-23 20:59 PATCH: add mv64x60 GPP IO pin/IRQ register definitions James Chapman
2005-02-23 22:26 ` Tom Rini [this message]
2005-02-24 9:37 ` James Chapman
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