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Date: Thu, 19 May 2005 13:13:29 -0700
From: Eugene Surovegin <ebs@ebshome.net>
To: Sanjay Bajaj <sbajaj@tsi-telsys.com>
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Cc: linuxppc-embedded@ozlabs.org
Subject: Re: tah reset?
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On Thu, May 19, 2005 at 03:45:50PM -0400, Sanjay Bajaj wrote:
> Eugene,
> 
> Yes, TAH0 in SDR0_MFR register is enabled.
> 
> EMAC is able to reset correctly, but TAH isn't at the same location 
> [in emac_probe()]. PHY is connected to EMAC and TAH is behind EMAC. 
> I do not understand how the RX clock from PHY will reach TAH? Any suggestions ?

E.g. TAH RX path is clocked from the same source as EMAC, I think 
it's quite obvious, but I digress.

What are you doing? Having problems with EMAC driver? What kernel 
version? What board?

You can try my new NAPI EMAC driver (http://kernel.ebshome.net/).

-- 
Eugene