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* MMUCR on ppc440 GP/GX
@ 2005-05-23 20:55 ming lei
  2005-05-23 22:03 ` Matt Porter
  0 siblings, 1 reply; 6+ messages in thread
From: ming lei @ 2005-05-23 20:55 UTC (permalink / raw)
  To: linuxppc-embedded; +Cc: mmporter

Hi,

I have problem on running system with linuxppc
2.4.19(ppc440GP/GX) regarding MMU Control
Register(MMUCR).

I checked the code in arch/ppc/ there is no code
setting or unsetting bit 12(DULXE) or bit 13(IULXE),
but somehow these two bits got changed during boot
process.

Question 1:
Does CPU or other hardware change these two bits? If
linux code doesnt set these two bits initiallt, what's
the default value?  Or I miss something in the code
that may change these two bits?

Question 2:
For current 2.4.19 PPC440 implementation, there is no
special handling for this kind of DataStorage
exception, is it possible for the user code to stuck
in this exception forever if these two bits got set in
MMUCR and the user code calls icbi instruction?

I did a simple test on head_440.S so whenever the
DataStorage exception happens, in DataStorage assmbly
code, I clear these two bits in MMUCR, but somehow
these two bits got set mysteriourly in next exception
with error_code 0x200000(got from ESR DLK bits).
What's happening here?

Thanks for any points and suggestions,
Ming



		
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: MMUCR on ppc440 GP/GX
  2005-05-23 20:55 ming lei
@ 2005-05-23 22:03 ` Matt Porter
  0 siblings, 0 replies; 6+ messages in thread
From: Matt Porter @ 2005-05-23 22:03 UTC (permalink / raw)
  To: ming lei; +Cc: linuxppc-embedded

On Mon, May 23, 2005 at 01:55:58PM -0700, ming lei wrote:
> Hi,
> 
> I have problem on running system with linuxppc
> 2.4.19(ppc440GP/GX) regarding MMU Control
> Register(MMUCR).
> 
> I checked the code in arch/ppc/ there is no code
> setting or unsetting bit 12(DULXE) or bit 13(IULXE),
> but somehow these two bits got changed during boot
> process.
> 
> Question 1:
> Does CPU or other hardware change these two bits? If
> linux code doesnt set these two bits initiallt, what's
> the default value?  Or I miss something in the code
> that may change these two bits?
> 
> Question 2:
> For current 2.4.19 PPC440 implementation, there is no
> special handling for this kind of DataStorage
> exception, is it possible for the user code to stuck
> in this exception forever if these two bits got set in
> MMUCR and the user code calls icbi instruction?
> 
> I did a simple test on head_440.S so whenever the
> DataStorage exception happens, in DataStorage assmbly
> code, I clear these two bits in MMUCR, but somehow
> these two bits got set mysteriourly in next exception
> with error_code 0x200000(got from ESR DLK bits).
> What's happening here?

Your kernel revision is very ancient. The problem here is that
you are trying to use _very_ early PPC440 core code I released.
It's filled with critical bugs that were fixed over time. The MMUCR
issue was fixed almost 3 years ago, in fact.

Your best solution is to run a more recent kernel.  If that's
not possible, then I suggest you backport all the PPC440
related code from a more recent kernel into your old kernel
base.

-Matt

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: MMUCR on ppc440 GP/GX
@ 2005-05-24 18:36 ming lei
  2005-05-24 20:38 ` Matt Porter
  0 siblings, 1 reply; 6+ messages in thread
From: ming lei @ 2005-05-24 18:36 UTC (permalink / raw)
  To: Matt Porter; +Cc: linuxppc-embedded


what's the latest ppc440 linux code that I can take
look at?

BTW, what's the problem three years ago prompted to
change the code regarding mmucr handling?

Thanks,
Ming


--- Matt Porter <mporter@kernel.crashing.org> wrote:
> On Mon, May 23, 2005 at 01:55:58PM -0700, ming lei
> wrote:
> > Hi,
> > 
> > I have problem on running system with linuxppc
> > 2.4.19(ppc440GP/GX) regarding MMU Control
> > Register(MMUCR).
> > 
> > I checked the code in arch/ppc/ there is no code
> > setting or unsetting bit 12(DULXE) or bit
> 13(IULXE),
> > but somehow these two bits got changed during boot
> > process.
> > 
> > Question 1:
> > Does CPU or other hardware change these two bits?
> If
> > linux code doesnt set these two bits initiallt,
> what's
> > the default value?  Or I miss something in the
> code
> > that may change these two bits?
> > 
> > Question 2:
> > For current 2.4.19 PPC440 implementation, there is
> no
> > special handling for this kind of DataStorage
> > exception, is it possible for the user code to
> stuck
> > in this exception forever if these two bits got
> set in
> > MMUCR and the user code calls icbi instruction?
> > 
> > I did a simple test on head_440.S so whenever the
> > DataStorage exception happens, in DataStorage
> assmbly
> > code, I clear these two bits in MMUCR, but somehow
> > these two bits got set mysteriourly in next
> exception
> > with error_code 0x200000(got from ESR DLK bits).
> > What's happening here?
> 
> Your kernel revision is very ancient. The problem
> here is that
> you are trying to use _very_ early PPC440 core code
> I released.
> It's filled with critical bugs that were fixed over
> time. The MMUCR
> issue was fixed almost 3 years ago, in fact.
> 
> Your best solution is to run a more recent kernel. 
> If that's
> not possible, then I suggest you backport all the
> PPC440
> related code from a more recent kernel into your old
> kernel
> base.
> 
> -Matt
> 


		
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: MMUCR on ppc440 GP/GX
  2005-05-24 18:36 MMUCR on ppc440 GP/GX ming lei
@ 2005-05-24 20:38 ` Matt Porter
  2005-06-01 21:32   ` Does linuxppc_2_4_devel still accept patch? ming lei
  0 siblings, 1 reply; 6+ messages in thread
From: Matt Porter @ 2005-05-24 20:38 UTC (permalink / raw)
  To: ming lei; +Cc: linuxppc-embedded

On Tue, May 24, 2005 at 11:36:50AM -0700, ming lei wrote:
> 
> what's the latest ppc440 linux code that I can take
> look at?

Grab the current kernel.org 2.6 release. I suggest you use
dirdiff another recent 2.4 kernel and then analyze the 2.6 stuff
as it is different yet.  There are countless bug fixes that have
gone in over the last 3 years.  I sincerely hope you aren't
trying to use that old kernel with experimental PPC440 support
for production work.
 
> BTW, what's the problem three years ago prompted to
> change the code regarding mmucr handling?

The problem was that the initial code would crash apps regularly. I
put the code out in our development tree at the time since it was
taking a long time to find the bug...and you could mostly run a
system.  The MMUCR was not having the TID set properly during
a tlbie() and a couple other spots in head_440.S.

-Matt

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: MMUCR on ppc440 GP/GX
@ 2005-05-24 22:30 ming lei
  0 siblings, 0 replies; 6+ messages in thread
From: ming lei @ 2005-05-24 22:30 UTC (permalink / raw)
  To: Matt Porter; +Cc: linuxppc-embedded

Hi Matt,

At your suggestion, I downloaded the latest
linuxppc_2_4_devel source code and also checked the
online code repository, and found this link:

http://ppc.bkbits.net:8080/linuxppc_2_4_devel/diffs/arch/ppc/kernel/head_440.S@1.4?nav=index.html|src/.|src/arch|src/arch/ppc|src/arch/ppc/kernel|hist/arch/ppc/kernel/head_440.S

which was submitted 4 years ago with comments as "Fix
MMUCR/tlbsx handling and set TS corrently in TLB
entries".

If this is the one you talked about the fix three
years ago, fortunately my ppc440 code already has the
fix, I compared it with latest linuxppc_2_4_devel
source code and it's the same.

I think the problem I have now is different, it's the
icbi call from user space code that caused DataStorage
exception if the corresponding bit in MMUCR is set,
however, ppc440 code doesnt handle it.

Any thought, or correction?

Thanks
Ming


--- Matt Porter <mporter@kernel.crashing.org> wrote:
> On Tue, May 24, 2005 at 11:36:50AM -0700, ming lei
> wrote:
> > 
> > what's the latest ppc440 linux code that I can
> take
> > look at?
> 
> Grab the current kernel.org 2.6 release. I suggest
> you use
> dirdiff another recent 2.4 kernel and then analyze
> the 2.6 stuff
> as it is different yet.  There are countless bug
> fixes that have
> gone in over the last 3 years.  I sincerely hope you
> aren't
> trying to use that old kernel with experimental
> PPC440 support
> for production work.
>  
> > BTW, what's the problem three years ago prompted
> to
> > change the code regarding mmucr handling?
> 
> The problem was that the initial code would crash
> apps regularly. I
> put the code out in our development tree at the time
> since it was
> taking a long time to find the bug...and you could
> mostly run a
> system.  The MMUCR was not having the TID set
> properly during
> a tlbie() and a couple other spots in head_440.S.
> 
> -Matt
> 

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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Does linuxppc_2_4_devel still accept patch?
  2005-05-24 20:38 ` Matt Porter
@ 2005-06-01 21:32   ` ming lei
  0 siblings, 0 replies; 6+ messages in thread
From: ming lei @ 2005-06-01 21:32 UTC (permalink / raw)
  To: linuxppc-embedded

Hi,

I found there is a serious problem in head_440.S
regarding the handling of mmucr in DataTLBmiss and
InstructionTLBmiss exceptions in 2.4 linux ppc branch.
Where should I submit the changes?

Which branch right now is active for ppc44x
development? Have we moved to linux kernel 2.6
official development already?

Ming

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^ permalink raw reply	[flat|nested] 6+ messages in thread

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2005-05-24 18:36 MMUCR on ppc440 GP/GX ming lei
2005-05-24 20:38 ` Matt Porter
2005-06-01 21:32   ` Does linuxppc_2_4_devel still accept patch? ming lei
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2005-05-24 22:30 MMUCR on ppc440 GP/GX ming lei
2005-05-23 20:55 ming lei
2005-05-23 22:03 ` Matt Porter

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