From: ming lei <mlei30@yahoo.com>
To: Dan Malek <dan@embeddededge.com>
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: double kernel page table entry for the same physical page?!
Date: Wed, 13 Jul 2005 14:48:02 -0700 (PDT) [thread overview]
Message-ID: <20050713214802.68288.qmail@web61016.mail.yahoo.com> (raw)
In-Reply-To: <2c008f2a8b3ef3ba33ec3d0f8a5c3390@embeddededge.com>
I am worried about memory corruption if there are two
PTE entries point to the same physical page.
Considering this case: vmalloc a page to a virt
address V1 and somehow other code uses V0(which is in
identy mapping) to modify the same physical page.
I checked i386 and looks like they have the same
problem.
Why linux kernel does such thing and no one consider
it's a problem?
Thanks
Ming
--- Dan Malek <dan@embeddededge.com> wrote:
>
> On Jul 13, 2005, at 1:10 PM, ming lei wrote:
>
> > Question: does the linux ever touch this section
> of
> > page table(virt address from PAGE_OFFSET to
> > PAGE_OFFSET+A) again? like remove or modify one of
> the
> > entry?
>
> Not usually. We used to do it on 8xx for mapping
> uncached pages for coherent DMA.
>
> > Question: For every physical page, it should
> already
> > be mapped in #1, but vmalloc maps it again to a
> virt
> > address higher. Does it mean in kernel page table,
> we
> > may have two PTE entries pointing to the same
> physical
> > page, even their virt addresses are different?
>
> Yep.
>
> > Last question:
> > If this is true, is this platform implemention
> > specific? Does i386 implemention have same
> situation?
>
> Other architectures will do the same, yes. The
> level to which they do this will vary depending upon
> architectural features we have to hide/expose to
> other functions.
>
> One potential problem that arises is you have to be
> careful about the virtual address access path to
> these
> pages. All processors will behave errantly if you
> access the same physical page, but with different
> attributes, through the different VAs. How they
> behave
> will depend upon the attributes. If the PTEs have
> different cache modes or page sizes, it's usually
> a big problem. If they just share different write
> permissions, it's usually OK. These problems
> usually
> arise when device driver writers either don't
> understand
> the mapping issues or try something that may work
> on one architecture but not on another.
>
>
> -- Dan
>
>
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next prev parent reply other threads:[~2005-07-13 21:48 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-07-13 20:10 double kernel page table entry for the same physical page?! ming lei
2005-07-13 21:27 ` Dan Malek
2005-07-13 21:48 ` ming lei [this message]
2005-07-13 22:36 ` Dan Malek
2005-07-14 1:57 ` ming lei
2005-07-14 7:15 ` Pantelis Antoniou
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