From: Tom Rini <trini@kernel.crashing.org>
To: Grant Likely <glikely@gmail.com>
Cc: Sylvain Munaut <tnt@246tnt.com>, linuxppc-embedded@ozlabs.org
Subject: Re: [PATCH] ppc32: Register definition for MPC52xx
Date: Mon, 18 Jul 2005 09:57:24 -0700 [thread overview]
Message-ID: <20050718165724.GE4370@smtp.west.cox.net> (raw)
In-Reply-To: <528646bc0507170006540ac67a@mail.gmail.com>
On Sun, Jul 17, 2005 at 01:06:03AM -0600, Grant Likely wrote:
> Here are additional register definitions for the MPC52xx. CDM clock
> enables and port config bit settings in mpc52xx.h. Registers needed
> to support non-UART PSC modes in mpc52xx_psc.h. Drivers which use
> these regs/bits are to follow once I'm happy with them, but I thought
> that others may be interested in them now.
>
> Cheers,
> g.
>
> Signed-off-by: Grant Likely <grant.likely@gdcanada.com>
These should be held off until the drivers are ready (and really only
what the drivers need). Thanks!
--
Tom Rini
http://gate.crashing.org/~trini/
prev parent reply other threads:[~2005-07-18 16:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-07-17 7:06 [PATCH] ppc32: Register definition for MPC52xx Grant Likely
2005-07-18 16:57 ` Tom Rini [this message]
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