I need help with L2 cache on 440GX rev C

I need help with L2 cache on 440GX rev C

[Nick Hennenfent]

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I have an embedded 440GX rev C runnng at about 500Mhz.
I am using a 2.4.20 linux kernel.
I borrowed Matt Porter's code from the 2.6 kernels in
order to enable the L2 cache. The code compiles and
runs ok, but the cache does not seem to be enabled!!!
I ran some tests with/without the L2 cache code and 
there is no difference.
(A qsort of 1 million random integers takes 2 seconds).
Is there some other magic trick to enable that cache????
Any help is much appreciated.
Thanks,
Nick Hennenfent




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Re: I need help with L2 cache on 440GX rev C

[Eugene Surovegin]

On Thu, Jul 21, 2005 at 08:44:46AM -0400, Nick Hennenfent wrote:
> 
> I have an embedded 440GX rev C runnng at about 500Mhz.
> I am using a 2.4.20 linux kernel.
> I borrowed Matt Porter's code from the 2.6 kernels in
> order to enable the L2 cache. The code compiles and
> runs ok, but the cache does not seem to be enabled!!!
> I ran some tests with/without the L2 cache code and 
> there is no difference.
> (A qsort of 1 million random integers takes 2 seconds).
> Is there some other magic trick to enable that cache????

No, there is no magic involved. 2.6 code (ibm440gx_l2c_enable()) 
works just fine.

Make sure your firmware doesn't enable L2C itself, in this case kernel 
enable code isn't needed at all, and you won't see any difference if 
you remove it.

2.6 has /proc/cpuinfo has a 440GX-specific handler 
(ibm440gx_show_cpuinfo()), you can put something similar into your 2.4 
kernel to see actual L2C state.

-- 
Eugene