* [PATCH] ppc32: fix ppc440 pagetable attributes
@ 2005-08-05 22:45 Matt Porter
2005-08-05 22:54 ` Andrew Morton
0 siblings, 1 reply; 3+ messages in thread
From: Matt Porter @ 2005-08-05 22:45 UTC (permalink / raw)
To: akpm; +Cc: linuxppc-embedded
This patch fixes a bug in the PPC440 pagetable attributes that breaks
swap support. It also adds some notes on the PPC440 attribute fields.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> for CELF
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Index: linux-2.6.12-bhpm/include/asm-ppc/pgtable.h
===================================================================
--- linux-2.6.12-bhpm.orig/include/asm-ppc/pgtable.h 2005-06-02 15:09:24.000000000 -0700
+++ linux-2.6.12-bhpm/include/asm-ppc/pgtable.h 2005-06-02 15:47:53.000000000 -0700
@@ -202,18 +202,64 @@
*
* Note that these bits preclude future use of a page size
* less than 4KB.
+ *
+ *
+ * PPC 440 core has following TLB attribute fields;
+ *
+ * TLB1:
+ * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ * RPN................................. - - - - - - ERPN.......
+ *
+ * TLB2:
+ * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
+ *
+ * There are some constrains and options, to decide mapping software bits
+ * into TLB entry.
+ *
+ * - PRESENT *must* be in the bottom three bits because swap cache
+ * entries use the top 29 bits for TLB2.
+ *
+ * - FILE *must* be in the bottom three bits because swap cache
+ * entries use the top 29 bits for TLB2.
+ *
+ * - CACHE COHERENT bit (M) has no effect on PPC440 core, because it
+ * doesn't support SMP. So we can use this as software bit, like
+ * DIRTY.
+ *
+ * PPC Book-E Linux implementation uses PPC HW PTE bit field definition,
+ * even it doesn't have HW PTE. 0-11th LSB of PTE stand for memory
+ * protection-related function. (See PTE structure in include/asm-ppc/mmu.h)
+ * Definition of _PAGE_XXX in "include/asm-ppc/pagetable.h" stands for
+ * above bits. Note that those bits values are CPU dependent, not
+ * architecture.
+ *
+ * Kernel PTE entry holds arch-dependent swp_entry structure under certain
+ * situation. In other words, in such situation, some portion of PTE bits
+ * are used as swp_entry. In PPC implementation, 3-24th LSB are shared with
+ * swp_entry, however 0-2nd three LSB still hold protection values.
+ * That means three protection bits are reserved for both PTE and SWAP
+ * entry at the most three LSBs.
+ *
+ * There are three protection bits available for SWAP entry;
+ * _PAGE_PRESENT
+ * _PAGE_FILE
+ * _PAGE_HASHPTE (if HW has)
+ *
+ * So those three bits have to be inside of 0-2nd LSB of PTE.
+ *
*/
+
#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
#define _PAGE_RW 0x00000002 /* S: Write permission */
-#define _PAGE_DIRTY 0x00000004 /* S: Page dirty */
+#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
#define _PAGE_HWWRITE 0x00000010 /* H: Dirty & RW */
#define _PAGE_HWEXEC 0x00000020 /* H: Execute permission */
#define _PAGE_USER 0x00000040 /* S: User page */
#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
#define _PAGE_GUARDED 0x00000100 /* H: G bit */
-#define _PAGE_COHERENT 0x00000200 /* H: M bit */
-#define _PAGE_FILE 0x00000400 /* S: nonlinear file mapping */
+#define _PAGE_DIRTY 0x00000200 /* S: Page dirty */
#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ppc32: fix ppc440 pagetable attributes
2005-08-05 22:45 [PATCH] ppc32: fix ppc440 pagetable attributes Matt Porter
@ 2005-08-05 22:54 ` Andrew Morton
2005-08-05 23:07 ` Matt Porter
0 siblings, 1 reply; 3+ messages in thread
From: Andrew Morton @ 2005-08-05 22:54 UTC (permalink / raw)
To: Matt Porter; +Cc: linuxppc-embedded
Matt Porter <mporter@kernel.crashing.org> wrote:
>
> This patch fixes a bug in the PPC440 pagetable attributes that breaks
> swap support. It also adds some notes on the PPC440 attribute fields.
hm, that looks pretty serious, but it affects all ppc's, yes?
Is this needed for 2.6.13? Are you super-sure it's safe?
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ppc32: fix ppc440 pagetable attributes
2005-08-05 22:54 ` Andrew Morton
@ 2005-08-05 23:07 ` Matt Porter
0 siblings, 0 replies; 3+ messages in thread
From: Matt Porter @ 2005-08-05 23:07 UTC (permalink / raw)
To: Andrew Morton; +Cc: linuxppc-embedded
On Fri, Aug 05, 2005 at 03:54:42PM -0700, Andrew Morton wrote:
> Matt Porter <mporter@kernel.crashing.org> wrote:
> >
> > This patch fixes a bug in the PPC440 pagetable attributes that breaks
> > swap support. It also adds some notes on the PPC440 attribute fields.
>
> hm, that looks pretty serious, but it affects all ppc's, yes?
Just PPC440. I originally organized the attributes incorrectly.
> Is this needed for 2.6.13? Are you super-sure it's safe?
This should go into 2.6.13. I doublechecked it by inspection and
ran numerous tests. It's only existed this long (years) due to the
fact that few people run a disk-based PPC440 system. I would have
sent it up sooner except I wanted to be very sure of my testing
since I don't always trust my own inspection. :)
-Matt
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2005-08-05 23:07 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2005-08-05 22:45 [PATCH] ppc32: fix ppc440 pagetable attributes Matt Porter
2005-08-05 22:54 ` Andrew Morton
2005-08-05 23:07 ` Matt Porter
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).