From: "Dale Farnsworth" <dale@farnsworth.org>
To: linuxppc-embedded@ozlabs.org
Subject: Re: Marvell MV64360 interrupt question
Date: Fri, 9 Sep 2005 13:49:55 -0700 [thread overview]
Message-ID: <20050909204955.GA15260@xyzzy.farnsworth.org> (raw)
In-Reply-To: <1126297220.21092.45.camel@excalibur.timesys.com>
On Fri, Sep 09, 2005 at 08:20:20PM +0000, Walter L. Wimer III wrote:
> On Fri, 2005-09-09 at 12:27 -0700, Dale Farnsworth wrote:
> >
> > No additional locking is necessary. In fact, it seems to me that the 32-bit
> > register reads and writes are already atomic and all of the locking using
> > mv64x60_lock is superfluous.
>
> Ah ha. mv64x60.h also defines an mv64x60_modify() function that isn't
> intrinsically atomic, so it needs the spinlock. That in turn requires
> mv64x60_read() and mv64x60_write() to play along too.
Yes, the lock is needed for mv64x60_modify(), mv64x60_write(). I still
don't think it's needed for mv64x60_read().
-Dale
next prev parent reply other threads:[~2005-09-09 20:49 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-09-09 17:31 Marvell MV64360 interrupt question Walter L. Wimer III
2005-09-09 19:09 ` Walter L. Wimer III
2005-09-12 12:56 ` Brian Waite
2005-09-09 19:27 ` Dale Farnsworth
2005-09-09 19:52 ` Walter L. Wimer III
2005-09-09 20:20 ` Walter L. Wimer III
2005-09-09 20:49 ` Dale Farnsworth [this message]
2005-09-09 21:18 ` Mark A. Greer
2005-09-12 13:05 ` Brian Waite
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