Re: MPC85xx i2c interface bug

["Dan Wilson" <dwilson@dslextreme.com>]

On 12/6/2005 at 11:24 AM Kumar Gala wrote:

> Dan,
> 
> I'm in agreement with your change for the 2.4 kernel.  It looks like  
> the 2.6 kernel driver is handing TXAK correctly.  The following is a  
> snippet from the 2.6 driver:
> 
>          if (length) {
>                  if (length == 1)
>                          writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA  
> | CCR_TXAK);
>                  else
>                          writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
>                  /* Dummy read */
>                  readb(i2c->base + MPC_I2C_DR);
>          }
> 
>          for (i = 0; i < length; i++) {
>                  if (i2c_wait(i2c, timeout, 0) < 0)
>                          return -1;
> 
>                  /* Generate txack on next to last byte */
>                  if (i == length - 2)
>                          writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA  
> | CCR_TXAK);
>                  /* Generate stop on last byte */
>                  if (i == length - 1)
>                          writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
>                  data[i] = readb(i2c->base + MPC_I2C_DR);
>          }
> 
> 
> If I'm reading it correctly it matches your changes.  If you dont  
> mind looking at this and verifying that you agree that we are setting  
> TXAK as expected.
> 
> - kumar
> 

Kumar,

Yes, the 2.6 code looks good to me too.  Thanks much for your help!

Dan.