From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Sun, 15 Jan 2006 01:15:33 -0600 To: Eugene Surovegin Subject: Re: [PATCH] powerpc: Add FSL SOC library and setup code Message-ID: <20060115071533.GA932@pb15.lixom.net> References: <20060114192158.GS2491@pb15.lixom.net> <20060114234754.GB29766@gate.ebshome.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20060114234754.GB29766@gate.ebshome.net> From: Olof Johansson Cc: Kumar Gala , linuxppc-embedded@ozlabs.org, linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Sat, Jan 14, 2006 at 03:47:54PM -0800, Eugene Surovegin wrote: > On Sat, Jan 14, 2006 at 01:21:58PM -0600, Olof Johansson wrote: > > > + > > > +static phys_addr_t immrbase = -1; > > > > What does immr mean? Maybe a short comment would be good. > > IMHO, this is not needed because _everybody_ who is working > with these chips know what IMMR means. And there cannot be _any_ > confusion about it. Let's not add useless comments. I haven't been exposed much yet to embedded 32-bit PPC, I thought at first that it was something chip-specific, not an architected feature common across the families. I agree, it doesn't really need further explanation in this case. -Olof