From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from amd.ucw.cz (gprs189-60.eurotel.cz [160.218.189.60]) by ozlabs.org (Postfix) with ESMTP id AF68768A9A for ; Fri, 27 Jan 2006 03:14:44 +1100 (EST) Date: Thu, 26 Jan 2006 17:14:27 +0100 From: Pavel Machek To: Akinobu Mita Subject: Re: [PATCH 1/6] {set,clear,test}_bit() related cleanup Message-ID: <20060126161426.GA1709@elf.ucw.cz> References: <20060125112625.GA18584@miraclelinux.com> <20060125112857.GB18584@miraclelinux.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20060125112857.GB18584@miraclelinux.com> Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, Ian Molton , Andi Kleen , David Howells , linuxppc-dev@ozlabs.org, Greg Ungerer , sparclinux@vger.kernel.org, Miles Bader , Yoshinori Sato , Hirokazu Takata , linuxsh-dev@lists.sourceforge.net, Linus Torvalds , Ivan Kokshaysky , Richard Henderson , Chris Zankel , dev-etrax@axis.com, ultralinux@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-kernel@vger.kernel.org, linuxsh-shmedia-dev@lists.sourceforge.net, linux390@de.ibm.com, Russell King , parisc-linux@parisc-linux.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi! > While working on these patch set, I found several possible cleanup > on x86-64 and ia64. It is probably not your fault, but... > Index: 2.6-git/include/asm-x86_64/mmu_context.h > =================================================================== > --- 2.6-git.orig/include/asm-x86_64/mmu_context.h 2006-01-25 19:07:15.000000000 +0900 > +++ 2.6-git/include/asm-x86_64/mmu_context.h 2006-01-25 19:13:59.000000000 +0900 > @@ -34,12 +34,12 @@ > unsigned cpu = smp_processor_id(); > if (likely(prev != next)) { > /* stop flush ipis for the previous mm */ > - clear_bit(cpu, &prev->cpu_vm_mask); > + cpu_clear(cpu, prev->cpu_vm_mask); > #ifdef CONFIG_SMP > write_pda(mmu_state, TLBSTATE_OK); > write_pda(active_mm, next); > #endif > - set_bit(cpu, &next->cpu_vm_mask); > + cpu_set(cpu, next->cpu_vm_mask); > load_cr3(next->pgd); > > if (unlikely(next->context.ldt != prev->context.ldt)) cpu_set sounds *very* ambiguous. We have thing called cpusets, for example. I'd not guess that is set_bit in cpu endianity (is it?). Pavel -- Thanks, Sharp!