linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
* MPC85xx TSEC performance limits
@ 2006-03-01 12:23 Joyeau Sylvain
  2006-03-01 15:25 ` Pantelis Antoniou
  0 siblings, 1 reply; 2+ messages in thread
From: Joyeau Sylvain @ 2006-03-01 12:23 UTC (permalink / raw)
  To: linuxppc-embedded

Hi,

Does anybody already succeeded in getting full TX bandwidth on a TSEC
interface, transmitting 1500 bytes frames at netdev level (ie calling
directly dev_queue_xmit(skb)) for instance ?

With default Gianfar driver parameters, I can transmit only around
870Mb/s (while reception side is idle). The other TSEC interface is used
only to control a telnet terminal (~1Kb/s), the CPU is idle 60%,
6000irq/s.

I must decrease TX threshold value from 1024 to 128 to get 960Mb/s.

The problem is that decreasing the TX threshold under 512 bytes has a
dramatic side effect: the Gianfar driver generates "TX underrun" events
as soon as  I start, in parallel, a DMA transfer from memory to memory.
Rather disappointing behavior from a PQ3@825MHz :-(

Any idea how to get full TX bandwidth _without_ modifying this
parameter?

Thanks.

--
sylvain

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: MPC85xx TSEC performance limits
  2006-03-01 12:23 MPC85xx TSEC performance limits Joyeau Sylvain
@ 2006-03-01 15:25 ` Pantelis Antoniou
  0 siblings, 0 replies; 2+ messages in thread
From: Pantelis Antoniou @ 2006-03-01 15:25 UTC (permalink / raw)
  To: linuxppc-embedded; +Cc: Joyeau Sylvain

On Wednesday 01 March 2006 14:23, Joyeau Sylvain wrote:
> Hi,
> 
> Does anybody already succeeded in getting full TX bandwidth on a TSEC
> interface, transmitting 1500 bytes frames at netdev level (ie calling
> directly dev_queue_xmit(skb)) for instance ?
> 
> With default Gianfar driver parameters, I can transmit only around
> 870Mb/s (while reception side is idle). The other TSEC interface is used
> only to control a telnet terminal (~1Kb/s), the CPU is idle 60%,
> 6000irq/s.
> 
> I must decrease TX threshold value from 1024 to 128 to get 960Mb/s.
> 
> The problem is that decreasing the TX threshold under 512 bytes has a
> dramatic side effect: the Gianfar driver generates "TX underrun" events
> as soon as  I start, in parallel, a DMA transfer from memory to memory.
> Rather disappointing behavior from a PQ3@825MHz :-(
> 
> Any idea how to get full TX bandwidth _without_ modifying this
> parameter?
> 
> Thanks.
> 
> --
> sylvain
>

I don't know 85xx in any great detail, but most QUICCs have a register
that controls the DMA bus arbitration priorities. Find it and give
the highest priority to the ethernet.

Pantelis

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2006-03-01 15:24 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2006-03-01 12:23 MPC85xx TSEC performance limits Joyeau Sylvain
2006-03-01 15:25 ` Pantelis Antoniou

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).