From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Mon, 13 Mar 2006 14:21:05 -0700 From: "Mark A. Greer" To: David Gibson Subject: dtc: .quad asm directive generation Message-ID: <20060313212105.GA11995@mag.az.mvista.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: linuxppc-dev List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi David, I'm playing around with moving some 32-bit embedded platforms (that don't have OF or dev-tree-aware uboot) to the powerpc tree. Basically, I make an initial .dts file for that platform then dtc-compile it using: dtc -I dts -O asm -o .S -V 16 .dts Then I build the .S file with the normal bootwrapper/kernel build. The problem I'm having is that dtc generates some .quad directives that is causing my 32-bit assembler to choke (.quad not supported). Do we need a 32-bit switch for dtc or should I be giving some sort of switch to gcc(version 3.4.3)/gas(version 2.15.94) to make it work? Thanks, Mark --- dts: ---- / { linux,phandle = <100>; model = "Sandpoint"; compatible = "MPC10x"; #address-cells = <1>; #size-cells = <1>; cpus { linux,phandle = <200>; #cpus = <1>; #address-cells = <1>; #size-cells = <0>; PowerPC,7447A { linux,phandle = <201>; linux,boot-cpu; device_type = "cpu"; reg = <0>; clock-frequency = ; /* 250 MHz on 82xx */ timebase-frequency = <3b9aca0>; /* 250/4 MHz */ i-cache-line-size = <20>; d-cache-line-size = <20>; i-cache-size = <4000>; /* 16MB L1 on 8245 */ d-cache-size = <4000>; /* 16MB L1 on 8245 */ }; }; memory { linux,phandle = <300>; device_type = "memory"; reg = <00000000 02000000>; /* 32 MB */ }; chosen { linux,phandle = <400>; linux,platform = <1>; bootargs = ""; linux,stdout-path = "/dev/ttyS0"; /* interrupt-controller = ; */ }; }; dtc asm output: --------------- /* autogenerated by dtc, do not edit */ dt_reserve_map: _dt_reserve_map: .quad 0, _dt_blob_start .quad 0, _dt_blob_end - _dt_blob_start /* Memory reserve map from source file */ .quad 0 .quad 0