From: Matt Porter <mporter@kernel.crashing.org>
To: Kallol Biswas <Kallol_Biswas@pmc-sierra.com>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: memory with __get_free_pages and disabling caching
Date: Fri, 24 Mar 2006 17:27:33 -0700 [thread overview]
Message-ID: <20060324172733.A20731@cox.net> (raw)
In-Reply-To: <478F19F21671F04298A2116393EEC3D50A9C8D@sjc1exm08.pmc_nt.nt.pmc-sierra.bc.ca>; from Kallol_Biswas@pmc-sierra.com on Fri, Mar 24, 2006 at 03:44:42PM -0800
On Fri, Mar 24, 2006 at 03:44:42PM -0800, Kallol Biswas wrote:
> Thank you.
>
> I wonder how consistent ptes are used if all kernel memory is mapped with large tlb.
> In the __dma_alloc_coherent() routine pages are allocated with alloc_pages(), new virtual address is created in consistent region, then consistent ptes are populated. Looks like that the routine creates a new virtual mapping. The memory is addressed with the new address.
>
> Do we have two mappings in the TLB for the same physical address?
Yes, that's how it works. After being allocated by the dma api
routines, the direct map is never accessed. Accessing the same
physical address via the cached direct map would cause serious
problems but you aren't allowed to touch address space like
that unless it's been allocated through a kernel allocator for
your use.
-Matt
next prev parent reply other threads:[~2006-03-25 2:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-03-24 23:44 memory with __get_free_pages and disabling caching Kallol Biswas
2006-03-25 0:20 ` Benjamin Herrenschmidt
2006-03-25 0:29 ` Matt Porter
2006-03-25 0:27 ` Matt Porter [this message]
2006-03-25 1:02 ` Benjamin Herrenschmidt
2006-03-25 1:25 ` Matt Porter
-- strict thread matches above, loose matches on Subject: below --
2006-03-24 19:13 Kallol Biswas
2006-03-24 19:29 ` Kumar Gala
2006-03-24 22:17 ` Paul Mackerras
2006-03-24 22:30 ` Benjamin Herrenschmidt
2006-03-24 2:15 Kallol Biswas
2006-03-24 3:05 ` Benjamin Herrenschmidt
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