From: Arnd Bergmann <arnd.bergmann@de.ibm.com>
To: linuxppc-embedded@ozlabs.org
Cc: "Muneeswaran P - TLS, Chennai" <muneeswaranp@hcl.in>
Subject: Re: Howto allocate non-cacheable memory
Date: Sun, 28 May 2006 17:36:14 +0200 [thread overview]
Message-ID: <200605281736.14905.arnd.bergmann@de.ibm.com> (raw)
In-Reply-To: <012301731C23DE4DBFE035647C68F1CC0331C84F@sindhu.ctd.hcltech.com>
On Saturday 27 May 2006 07:38, Muneeswaran P - TLS, Chennai wrote:
> =A0=A0=A0=A0=A0=A0=A0=A0Pls clarify the following doubts:
> =A0=A0=A0=A0=A0=A0=A0=A01. DPRAM is memory mapped to PCI-X card.
> =A0=A0=A0=A0=A0=A0=A0=A02. I have to transfer data from main memory to DP=
RAM using bus
> master concept and vice-versa.
> =A0=A0=A0=A0=A0=A0=A0=A03. How to make this memory area as non-cacheable =
one ?=20
> =A0=A0=A0=A0=A0=A0=A0=A04. Whether DMA mapping (pci_map_single() call ) s=
hould be done for
> both DPRAM and main memory ?
> =A0=A0=A0=A0=A0=A0=A0=A0 =A0 4.a) I will get the physical address of DPRA=
M memory (memory
> mapped to PCI-X card) from BAR-0 register. Can i use this physical addres
> directly for data transer using bus master (without pci_map_single() call=
=2E)
> ?
> =A0=A0=A0=A0=A0=A0=A0=A0 =A0 4.b) =A0How to make main memory area as non-=
cacheable one ?
You need pci_map_single() for all bus-master accesses from the PCI-X card
and ioremap() to map the card's registers and/or memory into your kernel
address space as cache-inhibited.
Depending on what your adapter does, you might want to map memory areas
on the card with __ioremap(addr, size, _PAGE_NO_CACHE) instead of
ioremap(addr, size) in order to get a non-guarded mapping.
Arnd <><
prev parent reply other threads:[~2006-05-28 15:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-27 5:38 Howto allocate non-cacheable memory Muneeswaran P - TLS, Chennai
2006-05-28 15:36 ` Arnd Bergmann [this message]
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