LXT973 support (dual PHY with single MDIO)

LXT973 support (dual PHY with single MDIO)

[Laurent Pinchart]

Hi everybody,

I'm trying to bring up the two ethernet ports on a LXT973 dual-PHY chip. I've 
declared two FCC platform devices, which are detected and handled by the 
driver/net/fs_enet driver. My issue comes from MDIO support.

The LXT973 has a single MDIO port which answers to two addresses, one for each 
PHY. The MDC and MDIO lines are connected to GPIO pins (no PHY interrupt), so 
I'm using the bitbang MDIO driver. I've declared a MPC82xx_MDIO_BB platform 
device, and set bus_id to "0:00" for both FCC ethernet devices. The first 
ethernet device works fine, but the second complains that the PHY is already 
in use.

As the PHY read/write accesses are protected by the bus->mdio_lock, I thought 
about declaring a second MDIO platform device using the same I/O pins as the 
first. Does anybody knows any problem I could run into using that approach ? 
Is there a better method to handle the LXT973 MDIO ?

Thanks in advance for any help you can provide.

Best regards,

Laurent Pinchart

Re: LXT973 support (dual PHY with single MDIO)

[Wojciech Kromer]

I'm sucesfully using this chip with denx.de 2.4.25 kernel and single 
MDIO port.
You need to  change auto PHY-addr detection method. By default it 
detects both PHYs on same addr.

Re: [SOLVED] LXT973 support (dual PHY with single MDIO)

[Laurent Pinchart]

Hi,

once again, posting to a mailing list helped me solving my problem. It should 
have been obvious that the MDIO bus is really a bus, and can as such support 
several devices. The issue was that the drivers/net/fs_enet driver set 
bus->phy_mask to ~0x9, and the LXT973 uses addresses 0 and 1. Address 1 thus 
never got probed. What's the reason for probing addresses 0 and 3 only ?

Laurent Pinchart

Re: [SOLVED] LXT973 support (dual PHY with single MDIO)

[Vitaly Bordug]

On Tue, 30 May 2006 11:28:48 +0200
Laurent Pinchart <laurent.pinchart@tbox.biz> wrote:

> Hi,
> 
> once again, posting to a mailing list helped me solving my problem. It should 
> have been obvious that the MDIO bus is really a bus, and can as such support 
> several devices. The issue was that the drivers/net/fs_enet driver set 
> bus->phy_mask to ~0x9, and the LXT973 uses addresses 0 and 1. Address 1 thus 
> never got probed. What's the reason for probing addresses 0 and 3 only ?

The reason is obvious: bitbang read of PHY id with not-existent PHY, does not return expected (0, iirc), that confuse mdio bus device-driver bound (it assumes error and returns -1), and prevents from probing other phys. So, as that seems to be a "feature" on CPM2 only, we are working that around specifying phy_mask to prevent probing inexistent phys w/over bitbang thing.


-- 
Sincerely, 
Vitaly

Re: [SOLVED] LXT973 support (dual PHY with single MDIO)

[Andy Fleming]

On May 30, 2006, at 09:22, Vitaly Bordug wrote:

> On Tue, 30 May 2006 11:28:48 +0200
> Laurent Pinchart <laurent.pinchart@tbox.biz> wrote:
>
>> Hi,
>>
>> once again, posting to a mailing list helped me solving my  
>> problem. It should
>> have been obvious that the MDIO bus is really a bus, and can as  
>> such support
>> several devices. The issue was that the drivers/net/fs_enet driver  
>> set
>> bus->phy_mask to ~0x9, and the LXT973 uses addresses 0 and 1.  
>> Address 1 thus
>> never got probed. What's the reason for probing addresses 0 and 3  
>> only ?
>
> The reason is obvious: bitbang read of PHY id with not-existent  
> PHY, does not return expected (0, iirc), that confuse mdio bus  
> device-driver bound (it assumes error and returns -1), and prevents  
> from probing other phys. So, as that seems to be a "feature" on  
> CPM2 only, we are working that around specifying phy_mask to  
> prevent probing inexistent phys w/over bitbang thing.


Hopefully, this isn't being set in the driver, but is set in the  
board code, instead.  This is a board-specific setting.

Andy