From: Matt Porter <mporter@embeddedalley.com>
To: Chris Dumoulin <cdumoulin@ics-ltd.com>, linuxppc-embedded@ozlabs.org
Subject: Re: Pinned TLB entries with 2.6 linux kernel on PPC4xx
Date: Thu, 1 Jun 2006 13:53:46 -0700 [thread overview]
Message-ID: <20060601135346.A23836@cox.net> (raw)
In-Reply-To: <20060601195129.GA15262@gate.ebshome.net>; from ebs@ebshome.net on Thu, Jun 01, 2006 at 12:51:29PM -0700
On Thu, Jun 01, 2006 at 12:51:29PM -0700, Eugene Surovegin wrote:
> On Thu, Jun 01, 2006 at 03:29:37PM -0400, Chris Dumoulin wrote:
> > Does the idea of creating pinned TLB entries (ones that will never be
> > overwritten) make sense for a PPC4xx (specifically PPC405) 2.6 linux
> > kernel? If so, how would this be accomplished?
>
> 44x kernel already pins some TLB entries, 40x may use this approach to
> increase performance (I use this in my internal 2.4 tree
> quite successfully).
>
> Old 2.4 trees (linuxppc-2.4 or devel_2_4) have TLB pinning support
> for 40x, you can look at the implementation there.
The partial kernel lowmem pinning for ppc405 was deprecated in favor
of having all of kernel lowmem covered by large pages and then large
TLBs loaded on tlb misses. This is regarding 2.6, of course.
It can also be extended to handle arbitrary areas other than kernel
lowmem.
-Matt
prev parent reply other threads:[~2006-06-01 20:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-06-01 19:29 Pinned TLB entries with 2.6 linux kernel on PPC4xx Chris Dumoulin
2006-06-01 19:51 ` Eugene Surovegin
2006-06-01 20:53 ` Matt Porter [this message]
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