what is the MPC8260 spi maximum rate ?

what is the MPC8260 spi maximum rate ?

[hubert.loewenguth]

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Hi everybody

I have a question about the spi on the MPC8260.
I have written a driver for this controller but there is something in 
the MPC8260 documentation I don't understand:

It is written in MPC8260 documentation (SPI chapter) : " The maximum 
sustained data rate that the SPI supports is SYSTEMCLK/50. However the 
spi can transfer a single character at much higher rates (SYSTEMCLK/4 in 
master mode)".

My really stupid question is ...... what is "SYSTEMCLK" ???????
is it the BRG_CLK ? the CPM_CLK or the CPU_CLK ????

Seeing that in the SPMODE register, the maximum SPI CLK possible is 
BRG_CLK/4, I imagine that this "SYSTEMCLK" is BRG_CLK, but this looks 
very strange .....


This question is quite stupid but very important for me in order to know 
if that controller permit to exchange data with one of our extention 
board at 1.2 MHz.

Anybody knows ?
Thanks very much for any help .

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Re: what is the MPC8260 spi maximum rate ?

[Wolfgang Denk]

Hello,

in message <44AA22E3.3050701@thales-bm.com> you wrote:
> 
> It is written in MPC8260 documentation (SPI chapter) : " The maximum 
> sustained data rate that the SPI supports is SYSTEMCLK/50. However the 
> spi can transfer a single character at much higher rates (SYSTEMCLK/4 in 
> master mode)".
> 
> My really stupid question is ...... what is "SYSTEMCLK" ???????
> is it the BRG_CLK ? the CPM_CLK or the CPU_CLK ????

The performance-limiting factor is the CPM, so it's most probably the
CPM clock.

> This question is quite stupid but very important for me in order to know 
> if that controller permit to exchange data with one of our extention 
> board at 1.2 MHz.

Keep in mind that SPI is implemented in software on the CPM, and that
it's running  at  very  low  priority.  All  calculations  assume  an
otherise  unloaded  CPM - but if you add load to the CPM, things will
change.

We haven't run specific measurements on the 8260, but on  the  MPC860
we  ran  into  a  *lot*  of  ugly  SPI problems when the CPM load got
higher, missing interrupts etc. being just one of the issues. At this
time, Motorola added a note to their FAQ  base,  which  stetd  pretty
clear  that  SPI  was  "not designed for high-bandwidth data communi-
cations".

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
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