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From: Gerhard Jaeger <g.jaeger@sysgo.com>
To: linuxppc-embedded@ozlabs.org
Subject: Re: Cache coherency question
Date: Mon, 28 Aug 2006 10:26:00 +0200
References: <4879B0C6C249214CBE7AB04453F84E4D0FC602@zch01exm20.fsl.freescale.net>
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On Monday 28 August 2006 09:08, Li Yang-r58472 wrote:
> 
> > -----Original Message-----
> > From: Liu Dave-r63238
> > Sent: Monday, August 28, 2006 3:00 PM
> > To: Li Yang-r58472; 'Martin, Tim'; 'ppc'
> > Subject: RE: Cache coherency question
> > 
> > <snip>
> > > Looking from source code, there is such problem for MV64360.
> > > It's likely that MV54360 has the same problem.
> > 
> > What is the MV54360?
> 
> From document at
> http://www.motorola.com/mot/doc/5/5503_MotDoc.pdf#search=%22MV54360%22
> The board uses MV54360.
> 
> I don't know if it is a typo or new variant though.

It's definitely a typo. In the block diagramm you'll see Discovery II
as system bridge and this one is the Marvel MV64360 (at least on the MVME6100).

-Gerhard

-- 
Gerhard Jaeger <gjaeger@sysgo.com>            
SYSGO AG                      Embedded and Real-Time Software
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