* 440SP External Interrupt IRQ
@ 2006-10-06 3:49 Jeff Stevens
2006-10-06 4:46 ` Stefan Roese
0 siblings, 1 reply; 4+ messages in thread
From: Jeff Stevens @ 2006-10-06 3:49 UTC (permalink / raw)
To: linuxppc-embedded
I am trying to figure out the PCI IRQ mapping on a
440SP processor in linux-2.6.17.9. I have a board
that is based off of the Luan development board, and I
am not sure which IRQ corresponds to each external
IRQ[0:5] pins on the processor. Where can I find this
information?
Thanks,
Jeff Stevens
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: 440SP External Interrupt IRQ
2006-10-06 3:49 440SP External Interrupt IRQ Jeff Stevens
@ 2006-10-06 4:46 ` Stefan Roese
2006-10-06 10:27 ` Jeff Stevens
0 siblings, 1 reply; 4+ messages in thread
From: Stefan Roese @ 2006-10-06 4:46 UTC (permalink / raw)
To: linuxppc-embedded
Jeff,
On Friday 06 October 2006 05:49, Jeff Stevens wrote:
> I am trying to figure out the PCI IRQ mapping on a
> 440SP processor in linux-2.6.17.9. I have a board
> that is based off of the Luan development board, and I
> am not sure which IRQ corresponds to each external
> IRQ[0:5] pins on the processor. Where can I find this
> information?
In your schematics. Sorry but it's that simple.
Best regards,
Stefan
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: 440SP External Interrupt IRQ
2006-10-06 4:46 ` Stefan Roese
@ 2006-10-06 10:27 ` Jeff Stevens
2006-10-06 16:06 ` Eugene Surovegin
0 siblings, 1 reply; 4+ messages in thread
From: Jeff Stevens @ 2006-10-06 10:27 UTC (permalink / raw)
To: Stefan Roese, linuxppc-embedded
I'm sorry if this is an easy question, but how do my
schematics tell me that pint IRQ0 uses IRQ 48 in my
board specific PCI IRQ lookup table, where it is
matching up the idsel lines to an irq number? For
instance, in arch/ppc/platforms/4xx/luan.c it maps PCI
interrupts like:
static inline int
luan_map_irq(struct pci_dev *dev, unsigned char idsel,
unsigned char pin)
{
struct pci_controller *hose =
pci_bus_to_hose(dev->bus->number);
/* PCIX0 in adapter mode, no host interrupt routing
*/
/* PCIX1 */
if (hose->index == 0) {
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{ 49, 49, 49, 49 }, /* IDSEL 1 - PCIX1 Slot 0 */
{ 49, 49, 49, 49 }, /* IDSEL 2 - PCIX1 Slot 1 */
{ 49, 49, 49, 49 }, /* IDSEL 3 - PCIX1 Slot 2 */
{ 49, 49, 49, 49 }, /* IDSEL 4 - PCIX1 Slot 3 */
};
const long min_idsel = 1, max_idsel = 4,
irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
/* PCIX2 */
} else if (hose->index == 1) {
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{ 50, 50, 50, 50 }, /* IDSEL 1 - PCIX2 Slot 0 */
{ 50, 50, 50, 50 }, /* IDSEL 2 - PCIX2 Slot 1 */
{ 50, 50, 50, 50 }, /* IDSEL 3 - PCIX2 Slot 2 */
{ 50, 50, 50, 50 }, /* IDSEL 4 - PCIX2 Slot 3 */
};
const long min_idsel = 1, max_idsel = 4,
irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
return -1;
}
Based on their schematics, I assume:
IRQ Line IRQ#
IRQ0 48
IRQ1 49
IRQ2 50
IRQ3 51
IRQ4 52
IRQ5 53
I just hate assuming, and would like to understand how
they come up with the IRQ offset for the external
interrups.
-Jeff
--- Stefan Roese <sr@denx.de> wrote:
> Jeff,
>
> On Friday 06 October 2006 05:49, Jeff Stevens wrote:
> > I am trying to figure out the PCI IRQ mapping on a
> > 440SP processor in linux-2.6.17.9. I have a board
> > that is based off of the Luan development board,
> and I
> > am not sure which IRQ corresponds to each external
> > IRQ[0:5] pins on the processor. Where can I find
> this
> > information?
>
> In your schematics. Sorry but it's that simple.
>
> Best regards,
> Stefan
>
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: 440SP External Interrupt IRQ
2006-10-06 10:27 ` Jeff Stevens
@ 2006-10-06 16:06 ` Eugene Surovegin
0 siblings, 0 replies; 4+ messages in thread
From: Eugene Surovegin @ 2006-10-06 16:06 UTC (permalink / raw)
To: Jeff Stevens; +Cc: Stefan Roese, linuxppc-embedded
On Fri, Oct 06, 2006 at 03:27:38AM -0700, Jeff Stevens wrote:
[snip]
> Based on their schematics, I assume:
> IRQ Line IRQ#
> IRQ0 48
> IRQ1 49
> IRQ2 50
> IRQ3 51
> IRQ4 52
> IRQ5 53
No, this mapping doesn't depend on board shematics. This is fixed, see
"Universal Interrupt controller" chapter in user manual.
What is not fixed is mapping between IDSEL line which selects your PCI
device and INTx# line from that PCI device to IRQx line in 440SP.
--
Eugene
^ permalink raw reply [flat|nested] 4+ messages in thread
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2006-10-06 3:49 440SP External Interrupt IRQ Jeff Stevens
2006-10-06 4:46 ` Stefan Roese
2006-10-06 10:27 ` Jeff Stevens
2006-10-06 16:06 ` Eugene Surovegin
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