* Help with an MMIO register read function
@ 2006-11-10 22:57 Carl Love
2006-11-10 23:10 ` Arnd Bergmann
0 siblings, 1 reply; 4+ messages in thread
From: Carl Love @ 2006-11-10 22:57 UTC (permalink / raw)
To: linuxppc-dev, cel
I am trying to print the value of the debug bus signal routing
registers to debug a potential issue in the RTAS call. There are a
number of MMIO addresses that I need to read and print. I was given a
little code segment to start with (see the example in the code below).
Based on that I wrote a function to read the 64 bit MMIO registers. The
issue that I have is the data is almost correct. Here is the output:
Print the pass through registers
L2_debug_1 addr 0x500858, value = 600000000000000
CIU_DR1 addr 0x500958, value = 4
on_ramp_trace 0x509c98, value = 100000000
MBL Debug addr 0x50a010, value = 80000
SBI_PMCR (MFC0) 0x4003c8, value = 200000000
SBI_PMCR (MFC1) 0x4023c8, value = 200000000
SBI_PMCR (MFC2) 0x4043c8, value = 200000000
SBI_PMCR (MFC3) 0x4063c8, value = 200000000
SBI_PMCR (MFC4) 0x4083c8, value = 200000000
SBI_PMCR (MFC5) 0x40a3c8, value = 200000000
SBI_PMCR (MFC6) 0x40c3c8, value = 200000000
SBI_PMCR (MFC7) 0x40e3c8, value = 200000000
I expect the SBI values to be 0x2000000 not 0x200000000. The L2 debug
value should be 0x6 not 0x600000000000000. It seems like the bits are
there but shifted from where I would expect them to be. Anyone have any
thoughts as to what is wrong?
Carl Love
static void dump_mmio_addr()
{
// need to include io.h
unsigned long *base;
unsigned long temp1;
unsigned offset;
struct device_node *node;
void __iomem *tmcu_regs;
// Example
// node = of_find_node_by_type(NULL, "cpu");
// base = (unsigned long *) get_property(node, "bp-base", NULL);
// tmcu_regs = ioremap(*base+0x509800, 0xB000);
// temp1 = readq(tmcu_regs + 0x0);
printk("Print the pass through registers\n");
node = of_find_node_by_type(NULL, "cpu");
base = (unsigned long *) get_property(node, "bp-base", NULL);
offset = 0x500858;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("L2_debug_1 addr 0x%x, value = %lx\n", offset, temp1);
offset = 0x500958;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("CIU_DR1 addr 0x%x, value = %lx\n", offset, temp1);
offset = 0x509c98;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("on_ramp_trace 0x%x, value = %lx\n", offset, temp1);
offset = 0x50A010;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("MBL Debug addr 0x%x, value = %lx\n", offset, temp1);
offset = 0x4003c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC0) 0x%x, value = %lx\n", offset, temp1);
offset = 0x4023c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC1) 0x%x, value = %lx\n", offset, temp1);
offset = 0x4043c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC2) 0x%x, value = %lx\n", offset, temp1);
offset = 0x4063c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC3) 0x%x, value = %lx\n", offset, temp1);
offset = 0x4083c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC4) 0x%x, value = %lx\n", offset, temp1);
offset = 0x40A3c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC5) 0x%x, value = %lx\n", offset, temp1);
offset = 0x40C3c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC6) 0x%x, value = %lx\n", offset, temp1);
offset = 0x40E3c8;
tmcu_regs = ioremap(*base+offset, 0xB000);
temp1 = readq(tmcu_regs + 0x0);
printk("SBI_PMCR (MFC7) 0x%x, value = %lx\n", offset, temp1);
}
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Help with an MMIO register read function
2006-11-10 22:57 Help with an MMIO register read function Carl Love
@ 2006-11-10 23:10 ` Arnd Bergmann
2006-11-11 1:46 ` Benjamin Herrenschmidt
0 siblings, 1 reply; 4+ messages in thread
From: Arnd Bergmann @ 2006-11-10 23:10 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Carl Love
On Friday 10 November 2006 23:57, Carl Love wrote:
> I expect the SBI values to be 0x2000000 =A0not 0x200000000. =A0The L2 deb=
ug
> value should be 0x6 not 0x600000000000000. =A0It seems like the bits are
> there but shifted from where I would expect them to be. =A0Anyone have any
> thoughts as to what is wrong?
Hmm, maybe you confused the bit order in the specification? IBM
counts the MSB as bit 0, while everyone else counts the LSB as
bit 0.
Arnd <><
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Help with an MMIO register read function
2006-11-10 23:10 ` Arnd Bergmann
@ 2006-11-11 1:46 ` Benjamin Herrenschmidt
2006-11-13 17:06 ` Carl Love
0 siblings, 1 reply; 4+ messages in thread
From: Benjamin Herrenschmidt @ 2006-11-11 1:46 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, Carl Love
On Sat, 2006-11-11 at 00:10 +0100, Arnd Bergmann wrote:
> On Friday 10 November 2006 23:57, Carl Love wrote:
> > I expect the SBI values to be 0x2000000 not 0x200000000. The L2 debug
> > value should be 0x6 not 0x600000000000000. It seems like the bits are
> > there but shifted from where I would expect them to be. Anyone have any
> > thoughts as to what is wrong?
>
> Hmm, maybe you confused the bit order in the specification? IBM
> counts the MSB as bit 0, while everyone else counts the LSB as
> bit 0.
I think in this case the problem is that he's using readq() which
byteswaps.
Ben.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Help with an MMIO register read function
2006-11-11 1:46 ` Benjamin Herrenschmidt
@ 2006-11-13 17:06 ` Carl Love
0 siblings, 0 replies; 4+ messages in thread
From: Carl Love @ 2006-11-13 17:06 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Arnd Bergmann
Ben:
Changing to the in_be64 function fixed the problem. Thanks for you help
on this. Using the dump function, we have been able to isolate the
problem with the RTAS call.
Carl Love
On Sat, 2006-11-11 at 12:46 +1100, Benjamin Herrenschmidt wrote:
> On Sat, 2006-11-11 at 00:10 +0100, Arnd Bergmann wrote:
> > On Friday 10 November 2006 23:57, Carl Love wrote:
> > > I expect the SBI values to be 0x2000000 not 0x200000000. The L2 debug
> > > value should be 0x6 not 0x600000000000000. It seems like the bits are
> > > there but shifted from where I would expect them to be. Anyone have any
> > > thoughts as to what is wrong?
> >
> > Hmm, maybe you confused the bit order in the specification? IBM
> > counts the MSB as bit 0, while everyone else counts the LSB as
> > bit 0.
>
> I think in this case the problem is that he's using readq() which
> byteswaps.
>
> Ben.
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2006-11-13 17:06 UTC | newest]
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2006-11-10 22:57 Help with an MMIO register read function Carl Love
2006-11-10 23:10 ` Arnd Bergmann
2006-11-11 1:46 ` Benjamin Herrenschmidt
2006-11-13 17:06 ` Carl Love
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