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From: Arnd Bergmann <arnd@arndb.de>
To: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH 2/16] add hypervisor support for SPU
Date: Fri, 17 Nov 2006 22:28:02 +0100	[thread overview]
Message-ID: <200611172228.02576.arnd@arndb.de> (raw)
In-Reply-To: <200611171033.kAHAXV97013086@toshiba.co.jp>

On Friday 17 November 2006 11:33, Ishizaki Kou wrote:
> We don't think that standard binding for SPE exists. Do you have any
> proposal? If you have, please send us your binding.
>
> On our device tree, property "reg" has unit number. Addresses are in
> property "priv2", "problem" and "local-store". Because of LPAR
> environment, property "priv1" does not exist.

Unfortunately, we don't have any official binding documents for this,
but you can look at how both methods are used in the source code now.

There should not be any priv2, problem or local-store properties
any more. We have chosen the order of these register areas in the
"reg" property to be "local-store", "problem", "priv2", "priv1",
where the last one is optional so you don't need to provide one
in a hypervisor.

Similarly, there should no longer be a single "isrc" property,
but rather a standard "interrupts" property with three values
that can be mapped to an interrupt number each, for class
0, 1 and 2 interrupts.

	Arnd <><

  reply	other threads:[~2006-11-17 21:28 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-11-17 10:33 [PATCH 2/16] add hypervisor support for SPU Ishizaki Kou
2006-11-17 21:28 ` Arnd Bergmann [this message]
2006-11-21 13:42   ` Ishizaki Kou
  -- strict thread matches above, loose matches on Subject: below --
2006-11-15  9:28 Ishizaki Kou
2006-11-15 15:47 ` Arnd Bergmann
2006-11-15 18:26 ` Christoph Hellwig
2006-11-15 23:33   ` Arnd Bergmann
2006-11-17 10:45     ` Ishizaki Kou
2006-11-17 14:01       ` Arnd Bergmann

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