From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from localhost.localdomain (unknown [85.21.88.2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id 0EE9B67D46 for ; Tue, 12 Dec 2006 03:28:47 +1100 (EST) To: Paul Mackerras From: Vitaly Bordug Subject: [PATCH 1/6] [POWERPC] 8xx: platform-specific mmu updates Date: Mon, 11 Dec 2006 19:28:25 +0300 Message-Id: <20061211162823.17227.65968.stgit@localhost.localdomain> In-Reply-To: <20061211192347.47700906@localhost.localdomain> References: <20061211192347.47700906@localhost.localdomain> Content-Type: text/plain; charset=utf-8; format=fixed Cc: linuxppc-dev List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This is just a straight port of the same done in arch/ppc by Marcelo Tosatti. One used to be [PATCH] ppc32 8xx: update_mmu_cache() needs unconditional tlbie, commit eb07d964b4491d1bb5864cd3d7e7633ccdda9a53 In a nutshell, the board is nearly stuck without this, yet without any visible failure - being just very slow. Signed-off-by: Vitaly Bordug --- arch/powerpc/mm/mem.c | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index d1c0758..c85eda6 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c @@ -490,19 +490,19 @@ #endif !cpu_has_feature(CPU_FTR_NOEXECUTE) && pfn_valid(pfn)) { struct page *page = pfn_to_page(pfn); +#ifdef CONFIG_8xx + /* On 8xx, cache control instructions (particularly + * "dcbst" from flush_dcache_icache) fault as write + * operation if there is an unpopulated TLB entry + * for the address in question. To workaround that, + * we invalidate the TLB here, thus avoiding dcbst + * misbehaviour. + */ + _tlbie(address); +#endif if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { if (vma->vm_mm == current->active_mm) { -#ifdef CONFIG_8xx - /* On 8xx, cache control instructions (particularly - * "dcbst" from flush_dcache_icache) fault as write - * operation if there is an unpopulated TLB entry - * for the address in question. To workaround that, - * we invalidate the TLB here, thus avoiding dcbst - * misbehaviour. - */ - _tlbie(address); -#endif __flush_dcache_icache((void *) address); } else flush_dcache_icache_page(page);