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* Fix breakage caused by tlb flush batch changes
@ 2007-04-18  6:19 David Gibson
  2007-04-18  7:39 ` Benjamin Herrenschmidt
  0 siblings, 1 reply; 3+ messages in thread
From: David Gibson @ 2007-04-18  6:19 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev

BenH's commit a741e67969577163a4cfc78d7fd2753219087ef1 in powerpc.git,
although (AFAICT) only intended to affect ppc64, also has side-effects
which break 44x.  I think 40x, 8xx and Freescale Book E are also
affected, though I haven't tested them.

The problem lies in unconditionally removing flush_tlb_pending() from
the versions of flush_tlb_mm(), flush_tlb_range() and
flush_tlb_kernel_range() used on ppc64 - which are also used the
embedded platforms mentioned above.

The patch below restores the necessary flushes and fixes the breakage
for 44x.  They should also fix any breakage for the other platforms,
but again I haven't tested those.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

Index: working-2.6/include/asm-powerpc/tlbflush.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/tlbflush.h	2007-04-18 15:45:12.000000000 +1000
+++ working-2.6/include/asm-powerpc/tlbflush.h	2007-04-18 15:55:21.000000000 +1000
@@ -104,6 +104,9 @@ extern void update_mmu_cache(struct vm_a
 
 static inline void flush_tlb_mm(struct mm_struct *mm)
 {
+#ifndef CONFIG_PPC64
+	flush_tlb_pending();
+#endif
 }
 
 static inline void flush_tlb_page(struct vm_area_struct *vma,
@@ -125,11 +128,17 @@ static inline void flush_tlb_page_nohash
 static inline void flush_tlb_range(struct vm_area_struct *vma,
 		unsigned long start, unsigned long end)
 {
+#ifndef CONFIG_PPC64
+	flush_tlb_pending();
+#endif
 }
 
 static inline void flush_tlb_kernel_range(unsigned long start,
 		unsigned long end)
 {
+#ifndef CONFIG_PPC64
+	flush_tlb_pending();
+#endif
 }
 
 #else	/* 6xx, 7xx, 7xxx cpus */

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: Fix breakage caused by tlb flush batch changes
  2007-04-18  6:19 Fix breakage caused by tlb flush batch changes David Gibson
@ 2007-04-18  7:39 ` Benjamin Herrenschmidt
  2007-04-18  8:04   ` David Gibson
  0 siblings, 1 reply; 3+ messages in thread
From: Benjamin Herrenschmidt @ 2007-04-18  7:39 UTC (permalink / raw)
  To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras

On Wed, 2007-04-18 at 16:19 +1000, David Gibson wrote:
> BenH's commit a741e67969577163a4cfc78d7fd2753219087ef1 in powerpc.git,
> although (AFAICT) only intended to affect ppc64, also has side-effects
> which break 44x.  I think 40x, 8xx and Freescale Book E are also
> affected, though I haven't tested them.
> 
> The problem lies in unconditionally removing flush_tlb_pending() from
> the versions of flush_tlb_mm(), flush_tlb_range() and
> flush_tlb_kernel_range() used on ppc64 - which are also used the
> embedded platforms mentioned above.
> 
> The patch below restores the necessary flushes and fixes the breakage
> for 44x.  They should also fix any breakage for the other platforms,
> but again I haven't tested those.

Damn, do these things use a batch at all ? If not, they should defkine
the whole set a functions separately rather than ifdef's like that...
flush_tlb_pending is a bad name for that.

Ben.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: Fix breakage caused by tlb flush batch changes
  2007-04-18  7:39 ` Benjamin Herrenschmidt
@ 2007-04-18  8:04   ` David Gibson
  0 siblings, 0 replies; 3+ messages in thread
From: David Gibson @ 2007-04-18  8:04 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Paul Mackerras

On Wed, Apr 18, 2007 at 05:39:52PM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2007-04-18 at 16:19 +1000, David Gibson wrote:
> > BenH's commit a741e67969577163a4cfc78d7fd2753219087ef1 in powerpc.git,
> > although (AFAICT) only intended to affect ppc64, also has side-effects
> > which break 44x.  I think 40x, 8xx and Freescale Book E are also
> > affected, though I haven't tested them.
> > 
> > The problem lies in unconditionally removing flush_tlb_pending() from
> > the versions of flush_tlb_mm(), flush_tlb_range() and
> > flush_tlb_kernel_range() used on ppc64 - which are also used the
> > embedded platforms mentioned above.
> > 
> > The patch below restores the necessary flushes and fixes the breakage
> > for 44x.  They should also fix any breakage for the other platforms,
> > but again I haven't tested those.
> 
> Damn, do these things use a batch at all ? If not, they should defkine
> the whole set a functions separately rather than ifdef's like that...
> flush_tlb_pending is a bad name for that.

No they don't and yes they should.  I was planning to do such a
redefinition along with other cleanups related to splitting the MMU
related .h files up by CPU/MMU family.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2007-04-18  6:19 Fix breakage caused by tlb flush batch changes David Gibson
2007-04-18  7:39 ` Benjamin Herrenschmidt
2007-04-18  8:04   ` David Gibson

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