From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gateway-1237.mvista.com (gateway-1237.mvista.com [63.81.120.158]) by ozlabs.org (Postfix) with ESMTP id ED387DDE07 for ; Tue, 8 May 2007 09:23:12 +1000 (EST) Date: Mon, 7 May 2007 16:26:34 -0700 From: Dave Jiang To: Kumar Gala Subject: [PATCH] powerpc: add dts entries to 85xx for EDAC Message-ID: <20070507232634.GA11166@blade.az.mvista.com> References: <20070425213700.GA8814@blade.az.mvista.com> <20070426000852.GA2193@localhost.localdomain> <20070426003748.GA30730@blade.az.mvista.com> <9903F55A-5E4E-42CE-8C27-6B7143B9FE25@kernel.crashing.org> <20070501183220.GA6426@blade.az.mvista.com> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 In-Reply-To: <20070501183220.GA6426@blade.az.mvista.com> Cc: linuxppc-dev@ozlabs.org, paulus@samba.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Adding memory-controller and l2-cache-controller entries to be used by EDAC as of_devices. Signed-off-by: Dave Jiang --- arch/powerpc/boot/dts/mpc8540ads.dts | 16 ++++++++++++++++ arch/powerpc/boot/dts/mpc8548cds.dts | 16 ++++++++++++++++ arch/powerpc/boot/dts/mpc8560ads.dts | 18 +++++++++++++++++- 3 files changed, 49 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index f261d64..f411bc1 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts @@ -48,6 +48,22 @@ reg = ; // CCSRBAR 1M bus-frequency = <0>; + memory-controller@2000 { + compatible = "fsl,85xx-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,85xx-memory-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index b2b2200..9de5c3a 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts @@ -48,6 +48,22 @@ reg = ; // CCSRBAR 1M bus-frequency = <0>; + memory-controller@2000 { + compatible = "fsl,85xx-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,85xx-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 1f2afe9..6e59364 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts @@ -48,6 +48,22 @@ reg = ; bus-frequency = <13ab6680>; + memory-controller@2000 { + compatible = "fsl,85xx-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,85xx-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + mdio@24520 { device_type = "mdio"; compatible = "gianfar"; @@ -110,7 +126,7 @@ #address-cells = <3>; compatible = "85xx"; device_type = "pci"; - reg = <8000 400>; + reg = <8000 1000>; clock-frequency = <3f940aa>; interrupt-map-mask = ; interrupt-map = <