* [PATCH 1/7] Remove fixup_bigphys_addr() for arch/powerpc
2007-05-10 6:04 [0/7] RFC: Assorted arch/powerpc mm related cleanups David Gibson
@ 2007-05-10 6:05 ` David Gibson
2007-05-10 6:05 ` [PATCH 3/7] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc David Gibson
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: David Gibson @ 2007-05-10 6:05 UTC (permalink / raw)
To: linuxppc-dev
There are no actual implementations of fixup_bigphys_addr() in
arch/powerpc, and with a 64-bit aware ioremap() and so forth, it
should no longer be necessary. This patch removes the last dregs of
fixup_bigphys_addr() from arch/powerpc.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/asm-powerpc/mmu-44x.h | 2 --
include/asm-powerpc/pgtable-ppc32.h | 15 ---------------
2 files changed, 17 deletions(-)
Index: working-2.6/include/asm-powerpc/mmu-44x.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-44x.h 2007-05-09 13:14:53.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-44x.h 2007-05-09 13:15:10.000000000 +1000
@@ -55,8 +55,6 @@
typedef unsigned long long phys_addr_t;
-extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
-
typedef struct {
unsigned long id;
unsigned long vdso_base;
Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc32.h 2007-05-09 13:14:25.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc32.h 2007-05-09 13:14:42.000000000 +1000
@@ -782,23 +782,8 @@ extern void kernel_set_cachemode (unsign
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
#define kern_addr_valid(addr) (1)
-#ifdef CONFIG_PHYS_64BIT
-extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
- unsigned long paddr, unsigned long size, pgprot_t prot);
-
-static inline int io_remap_pfn_range(struct vm_area_struct *vma,
- unsigned long vaddr,
- unsigned long pfn,
- unsigned long size,
- pgprot_t prot)
-{
- phys_addr_t paddr64 = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
- return remap_pfn_range(vma, vaddr, paddr64 >> PAGE_SHIFT, size, prot);
-}
-#else
#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
remap_pfn_range(vma, vaddr, pfn, size, prot)
-#endif
/*
* No page table caches to initialise
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 3/7] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc
2007-05-10 6:04 [0/7] RFC: Assorted arch/powerpc mm related cleanups David Gibson
2007-05-10 6:05 ` [PATCH 1/7] Remove fixup_bigphys_addr() for arch/powerpc David Gibson
@ 2007-05-10 6:05 ` David Gibson
2007-05-10 6:05 ` [PATCH 7/7] Kill typedef-ed structs for hash PTEs and BATs David Gibson
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: David Gibson @ 2007-05-10 6:05 UTC (permalink / raw)
To: linuxppc-dev
These old-fashioned IO mapping functions no longer have any callers in
code which remains relevant on arch/powerpc. Therefore, this patch
removes them from arch/powerpc.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/mm/pgtable_32.c | 118 ------------------------------------
include/asm-powerpc/io.h | 7 --
include/asm-powerpc/pgtable-ppc32.h | 2
3 files changed, 127 deletions(-)
Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_32.c 2007-05-10 13:48:49.000000000 +1000
+++ working-2.6/arch/powerpc/mm/pgtable_32.c 2007-05-10 13:52:29.000000000 +1000
@@ -303,48 +303,6 @@ void __init mapin_ram(void)
/* is x a power of 4? */
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
-/*
- * Set up a mapping for a block of I/O.
- * virt, phys, size must all be page-aligned.
- * This should only be called before ioremap is called.
- */
-void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
- unsigned int size, int flags)
-{
- int i;
-
- if (virt > KERNELBASE && virt < ioremap_bot)
- ioremap_bot = ioremap_base = virt;
-
-#ifdef HAVE_BATS
- /*
- * Use a BAT for this if possible...
- */
- if (io_bat_index < 2 && is_power_of_2(size)
- && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
- setbat(io_bat_index, virt, phys, size, flags);
- ++io_bat_index;
- return;
- }
-#endif /* HAVE_BATS */
-
-#ifdef HAVE_TLBCAM
- /*
- * Use a CAM for this if possible...
- */
- if (tlbcam_index < num_tlbcam_entries && is_power_of_4(size)
- && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
- settlbcam(tlbcam_index, virt, phys, size, flags, 0);
- ++tlbcam_index;
- return;
- }
-#endif /* HAVE_TLBCAM */
-
- /* No BATs available, put it in the page tables. */
- for (i = 0; i < size; i += PAGE_SIZE)
- map_page(virt + i, phys + i, flags);
-}
-
/* Scan the real Linux page tables and return a PTE pointer for
* a virtual address in a context.
* Returns true (1) if PTE was found, zero otherwise. The pointer to
@@ -379,82 +337,6 @@ get_pteptr(struct mm_struct *mm, unsigne
return(retval);
}
-/* Find physical address for this virtual address. Normally used by
- * I/O functions, but anyone can call it.
- */
-unsigned long iopa(unsigned long addr)
-{
- unsigned long pa;
-
- /* I don't know why this won't work on PMacs or CHRP. It
- * appears there is some bug, or there is some implicit
- * mapping done not properly represented by BATs or in page
- * tables.......I am actively working on resolving this, but
- * can't hold up other stuff. -- Dan
- */
- pte_t *pte;
- struct mm_struct *mm;
-
- /* Check the BATs */
- pa = v_mapped_by_bats(addr);
- if (pa)
- return pa;
-
- /* Allow mapping of user addresses (within the thread)
- * for DMA if necessary.
- */
- if (addr < TASK_SIZE)
- mm = current->mm;
- else
- mm = &init_mm;
-
- pa = 0;
- if (get_pteptr(mm, addr, &pte, NULL)) {
- pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK);
- pte_unmap(pte);
- }
-
- return(pa);
-}
-
-/* This is will find the virtual address for a physical one....
- * Swiped from APUS, could be dangerous :-).
- * This is only a placeholder until I really find a way to make this
- * work. -- Dan
- */
-unsigned long
-mm_ptov (unsigned long paddr)
-{
- unsigned long ret;
-#if 0
- if (paddr < 16*1024*1024)
- ret = ZTWO_VADDR(paddr);
- else {
- int i;
-
- for (i = 0; i < kmap_chunk_count;){
- unsigned long phys = kmap_chunks[i++];
- unsigned long size = kmap_chunks[i++];
- unsigned long virt = kmap_chunks[i++];
- if (paddr >= phys
- && paddr < (phys + size)){
- ret = virt + paddr - phys;
- goto exit;
- }
- }
-
- ret = (unsigned long) __va(paddr);
- }
-exit:
-#ifdef DEBUGPV
- printk ("PTOV(%lx)=%lx\n", paddr, ret);
-#endif
-#else
- ret = (unsigned long)paddr + KERNELBASE;
-#endif
- return ret;
-}
-
#ifdef CONFIG_DEBUG_PAGEALLOC
static int __change_page_attr(struct page *page, pgprot_t prot)
Index: working-2.6/include/asm-powerpc/io.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/io.h 2007-05-10 13:49:20.000000000 +1000
+++ working-2.6/include/asm-powerpc/io.h 2007-05-10 13:52:41.000000000 +1000
@@ -636,13 +636,6 @@ extern int __iounmap_explicit(volatile v
extern void __iomem * reserve_phb_iospace(unsigned long size);
-/* Those are more 32 bits only functions */
-extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
-extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
- unsigned int size, int flags);
-
-
/*
* When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation
* which needs some additional definitions here. They basically allow PIO
Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 13:49:35.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 13:52:49.000000000 +1000
@@ -756,8 +756,6 @@ extern void paging_init(void);
extern void cache_clear(__u32 addr, int length);
extern void cache_push(__u32 addr, int length);
extern int mm_end_of_chunk (unsigned long addr, int len);
-extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
/* Values for nocacheflag and cmode */
/* These are not used by the APUS kernel_map, but prevents
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 7/7] Kill typedef-ed structs for hash PTEs and BATs
2007-05-10 6:04 [0/7] RFC: Assorted arch/powerpc mm related cleanups David Gibson
2007-05-10 6:05 ` [PATCH 1/7] Remove fixup_bigphys_addr() for arch/powerpc David Gibson
2007-05-10 6:05 ` [PATCH 3/7] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc David Gibson
@ 2007-05-10 6:05 ` David Gibson
2007-05-11 7:12 ` David Gibson
2007-05-10 6:05 ` [PATCH 5/7] Remove a couple of unused definitions from pgtable_32.c David Gibson
` (3 subsequent siblings)
6 siblings, 1 reply; 9+ messages in thread
From: David Gibson @ 2007-05-10 6:05 UTC (permalink / raw)
To: linuxppc-dev
Using typedefs to rename structure types if frowned on by CodingStyle.
However, we do so for the hash PTE structure on both ppc32 (where it's
called "PTE") and ppc64 (where it's called "hpte_t"). On ppc32 we
also have such a typedef for the BATs ("BAT").
This patch removes this unhelpful use of typedefs, in the process
bringing ppc32 and ppc64 closer together, by using the name "struct
hash_pte" in both cases.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/mm/hash_native_64.c | 22 +++++++++++-----------
arch/powerpc/mm/hash_utils_64.c | 2 +-
arch/powerpc/mm/mmu_decl.h | 4 ++--
arch/powerpc/mm/ppc_mmu_32.c | 6 +++---
arch/powerpc/platforms/ps3/htab.c | 14 +++++++-------
include/asm-powerpc/mmu-hash32.h | 8 ++++----
include/asm-powerpc/mmu-hash64.h | 6 +++---
7 files changed, 31 insertions(+), 31 deletions(-)
Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-hash32.h 2007-05-10 15:51:06.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-hash32.h 2007-05-10 15:51:20.000000000 +1000
@@ -28,7 +28,7 @@
#define BPP_RW 0x02 /* Read/write */
#ifndef __ASSEMBLY__
-typedef struct _BAT {
+struct ppc_bat {
struct {
unsigned long bepi:15; /* Effective page index (virtual address) */
unsigned long :4; /* Unused */
@@ -46,7 +46,7 @@ typedef struct _BAT {
unsigned long :1; /* Unused */
unsigned long pp:2; /* Page access protections */
} batl; /* Lower register */
-} BAT;
+};
#endif /* !__ASSEMBLY__ */
/*
@@ -62,7 +62,7 @@ typedef struct _BAT {
#ifndef __ASSEMBLY__
/* Hardware Page Table Entry */
-typedef struct _PTE {
+struct hash_pte {
unsigned long v:1; /* Entry is valid */
unsigned long vsid:24; /* Virtual segment identifier */
unsigned long h:1; /* Hash algorithm indicator */
@@ -77,7 +77,7 @@ typedef struct _PTE {
unsigned long g:1; /* Guarded */
unsigned long :1; /* Unused */
unsigned long pp:2; /* Page protection */
-} PTE;
+};
typedef struct {
unsigned long id;
Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/ppc_mmu_32.c 2007-05-10 15:51:06.000000000 +1000
+++ working-2.6/arch/powerpc/mm/ppc_mmu_32.c 2007-05-10 15:51:20.000000000 +1000
@@ -34,12 +34,12 @@
#include "mmu_decl.h"
-PTE *Hash, *Hash_end;
+struct hash_pte *Hash, *Hash_end;
unsigned long Hash_size, Hash_mask;
unsigned long _SDR1;
union ubat { /* BAT register values to be loaded */
- BAT bat;
+ struct ppc_bat bat;
u32 word[2];
} BATS[8][2]; /* 8 pairs of IBAT, DBAT */
@@ -244,7 +244,7 @@ void __init MMU_init_hw(void)
cacheable_memzero(Hash, Hash_size);
_SDR1 = __pa(Hash) | SDR1_LOW_BITS;
- Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
+ Hash_end = (struct hash_pte *) ((unsigned long)Hash + Hash_size);
printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n",
total_memory >> 20, Hash_size >> 10, Hash);
Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_decl.h 2007-05-10 15:51:06.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mmu_decl.h 2007-05-10 15:51:20.000000000 +1000
@@ -39,8 +39,8 @@ extern int __map_without_bats;
extern unsigned long ioremap_base;
extern unsigned int rtas_data, rtas_size;
-struct _PTE;
-extern struct _PTE *Hash, *Hash_end;
+struct hash_pte;
+extern struct hash_pte *Hash, *Hash_end;
extern unsigned long Hash_size, Hash_mask;
extern unsigned int num_tlbcam_entries;
Index: working-2.6/include/asm-powerpc/mmu-hash64.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-hash64.h 2007-05-10 15:51:06.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-hash64.h 2007-05-10 15:51:20.000000000 +1000
@@ -102,12 +102,12 @@ extern char initial_stab[];
#ifndef __ASSEMBLY__
-typedef struct {
+struct hash_pte {
unsigned long v;
unsigned long r;
-} hpte_t;
+};
-extern hpte_t *htab_address;
+extern struct hash_pte *htab_address;
extern unsigned long htab_size_bytes;
extern unsigned long htab_hash_mask;
Index: working-2.6/arch/powerpc/mm/hash_native_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/hash_native_64.c 2007-05-10 15:51:06.000000000 +1000
+++ working-2.6/arch/powerpc/mm/hash_native_64.c 2007-05-10 15:51:20.000000000 +1000
@@ -104,7 +104,7 @@ static inline void tlbie(unsigned long v
spin_unlock(&native_tlbie_lock);
}
-static inline void native_lock_hpte(hpte_t *hptep)
+static inline void native_lock_hpte(struct hash_pte *hptep)
{
unsigned long *word = &hptep->v;
@@ -116,7 +116,7 @@ static inline void native_lock_hpte(hpte
}
}
-static inline void native_unlock_hpte(hpte_t *hptep)
+static inline void native_unlock_hpte(struct hash_pte *hptep)
{
unsigned long *word = &hptep->v;
@@ -128,7 +128,7 @@ static long native_hpte_insert(unsigned
unsigned long pa, unsigned long rflags,
unsigned long vflags, int psize)
{
- hpte_t *hptep = htab_address + hpte_group;
+ struct hash_pte *hptep = htab_address + hpte_group;
unsigned long hpte_v, hpte_r;
int i;
@@ -177,7 +177,7 @@ static long native_hpte_insert(unsigned
static long native_hpte_remove(unsigned long hpte_group)
{
- hpte_t *hptep;
+ struct hash_pte *hptep;
int i;
int slot_offset;
unsigned long hpte_v;
@@ -217,7 +217,7 @@ static long native_hpte_remove(unsigned
static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
unsigned long va, int psize, int local)
{
- hpte_t *hptep = htab_address + slot;
+ struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v, want_v;
int ret = 0;
@@ -251,7 +251,7 @@ static long native_hpte_updatepp(unsigne
static long native_hpte_find(unsigned long va, int psize)
{
- hpte_t *hptep;
+ struct hash_pte *hptep;
unsigned long hash;
unsigned long i, j;
long slot;
@@ -294,7 +294,7 @@ static void native_hpte_updateboltedpp(u
{
unsigned long vsid, va;
long slot;
- hpte_t *hptep;
+ struct hash_pte *hptep;
vsid = get_kernel_vsid(ea);
va = (vsid << 28) | (ea & 0x0fffffff);
@@ -315,7 +315,7 @@ static void native_hpte_updateboltedpp(u
static void native_hpte_invalidate(unsigned long slot, unsigned long va,
int psize, int local)
{
- hpte_t *hptep = htab_address + slot;
+ struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v;
unsigned long want_v;
unsigned long flags;
@@ -345,7 +345,7 @@ static void native_hpte_invalidate(unsig
#define LP_BITS 8
#define LP_MASK(i) ((0xFF >> (i)) << LP_SHIFT)
-static void hpte_decode(hpte_t *hpte, unsigned long slot,
+static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
int *psize, unsigned long *va)
{
unsigned long hpte_r = hpte->r;
@@ -418,7 +418,7 @@ static void hpte_decode(hpte_t *hpte, un
static void native_hpte_clear(void)
{
unsigned long slot, slots, flags;
- hpte_t *hptep = htab_address;
+ struct hash_pte *hptep = htab_address;
unsigned long hpte_v, va;
unsigned long pteg_count;
int psize;
@@ -465,7 +465,7 @@ static void native_hpte_clear(void)
static void native_flush_hash_range(unsigned long number, int local)
{
unsigned long va, hash, index, hidx, shift, slot;
- hpte_t *hptep;
+ struct hash_pte *hptep;
unsigned long hpte_v;
unsigned long want_v;
unsigned long flags;
Index: working-2.6/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/hash_utils_64.c 2007-05-10 15:51:06.000000000 +1000
+++ working-2.6/arch/powerpc/mm/hash_utils_64.c 2007-05-10 15:51:20.000000000 +1000
@@ -87,7 +87,7 @@ extern unsigned long dart_tablebase;
static unsigned long _SDR1;
struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
-hpte_t *htab_address;
+struct hash_pte *htab_address;
unsigned long htab_size_bytes;
unsigned long htab_hash_mask;
int mmu_linear_psize = MMU_PAGE_4K;
Index: working-2.6/arch/powerpc/platforms/ps3/htab.c
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/ps3/htab.c 2007-05-10 15:51:06.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/ps3/htab.c 2007-05-10 15:51:20.000000000 +1000
@@ -34,7 +34,7 @@
#define DBG(fmt...) do{if(0)printk(fmt);}while(0)
#endif
-static hpte_t *htab;
+static struct hash_pte *htab;
static unsigned long htab_addr;
static unsigned char *bolttab;
static unsigned char *inusetab;
@@ -44,8 +44,8 @@ static DEFINE_SPINLOCK(ps3_bolttab_lock)
#define debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g) \
_debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g, __func__, __LINE__)
static void _debug_dump_hpte(unsigned long pa, unsigned long va,
- unsigned long group, unsigned long bitmap, hpte_t lhpte, int psize,
- unsigned long slot, const char* func, int line)
+ unsigned long group, unsigned long bitmap, struct hash_pte lhpte,
+ int psize, unsigned long slot, const char* func, int line)
{
DBG("%s:%d: pa = %lxh\n", func, line, pa);
DBG("%s:%d: lpar = %lxh\n", func, line,
@@ -63,7 +63,7 @@ static long ps3_hpte_insert(unsigned lon
unsigned long pa, unsigned long rflags, unsigned long vflags, int psize)
{
unsigned long slot;
- hpte_t lhpte;
+ struct hash_pte lhpte;
int secondary = 0;
unsigned long result;
unsigned long bitmap;
@@ -255,7 +255,7 @@ void __init ps3_hpte_init(unsigned long
ppc64_pft_size = __ilog2(htab_size);
- bitmap_size = htab_size / sizeof(hpte_t) / 8;
+ bitmap_size = htab_size / sizeof(struct hash_pte) / 8;
bolttab = __va(lmb_alloc(bitmap_size, 1));
inusetab = __va(lmb_alloc(bitmap_size, 1));
@@ -273,8 +273,8 @@ void __init ps3_map_htab(void)
result = lv1_map_htab(0, &htab_addr);
- htab = (hpte_t *)__ioremap(htab_addr, htab_size,
- pgprot_val(PAGE_READONLY_X));
+ htab = (struct hash_pte *)__ioremap(htab_addr, htab_size,
+ pgprot_val(PAGE_READONLY_X));
DBG("%s:%d: lpar %016lxh, virt %016lxh\n", __func__, __LINE__,
htab_addr, (unsigned long)htab);
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 7/7] Kill typedef-ed structs for hash PTEs and BATs
2007-05-10 6:05 ` [PATCH 7/7] Kill typedef-ed structs for hash PTEs and BATs David Gibson
@ 2007-05-11 7:12 ` David Gibson
0 siblings, 0 replies; 9+ messages in thread
From: David Gibson @ 2007-05-11 7:12 UTC (permalink / raw)
To: linuxppc-dev
On Thu, May 10, 2007 at 04:05:56PM +1000, David Gibson wrote:
> Using typedefs to rename structure types if frowned on by CodingStyle.
> However, we do so for the hash PTE structure on both ppc32 (where it's
> called "PTE") and ppc64 (where it's called "hpte_t"). On ppc32 we
> also have such a typedef for the BATs ("BAT").
>
> This patch removes this unhelpful use of typedefs, in the process
> bringing ppc32 and ppc64 closer together, by using the name "struct
> hash_pte" in both cases.
Oops. Forgot to fix up the iSeries code for this change, breaking
compile. Revised patch below.
Kill typedef-ed structs for hash PTEs and BATs
Using typedefs to rename structure types if frowned on by CodingStyle.
However, we do so for the hash PTE structure on both ppc32 (where it's
called "PTE") and ppc64 (where it's called "hpte_t"). On ppc32 we
also have such a typedef for the BATs ("BAT").
This patch removes this unhelpful use of typedefs, in the process
bringing ppc32 and ppc64 closer together, by using the name "struct
hash_pte" in both cases.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-hash32.h 2007-05-11 09:25:10.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-hash32.h 2007-05-11 09:25:10.000000000 +1000
@@ -28,7 +28,7 @@
#define BPP_RW 0x02 /* Read/write */
#ifndef __ASSEMBLY__
-typedef struct _BAT {
+struct ppc_bat {
struct {
unsigned long bepi:15; /* Effective page index (virtual address) */
unsigned long :4; /* Unused */
@@ -46,7 +46,7 @@ typedef struct _BAT {
unsigned long :1; /* Unused */
unsigned long pp:2; /* Page access protections */
} batl; /* Lower register */
-} BAT;
+};
#endif /* !__ASSEMBLY__ */
/*
@@ -62,7 +62,7 @@ typedef struct _BAT {
#ifndef __ASSEMBLY__
/* Hardware Page Table Entry */
-typedef struct _PTE {
+struct hash_pte {
unsigned long v:1; /* Entry is valid */
unsigned long vsid:24; /* Virtual segment identifier */
unsigned long h:1; /* Hash algorithm indicator */
@@ -77,7 +77,7 @@ typedef struct _PTE {
unsigned long g:1; /* Guarded */
unsigned long :1; /* Unused */
unsigned long pp:2; /* Page protection */
-} PTE;
+};
typedef struct {
unsigned long id;
Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/ppc_mmu_32.c 2007-05-11 09:25:10.000000000 +1000
+++ working-2.6/arch/powerpc/mm/ppc_mmu_32.c 2007-05-11 09:25:10.000000000 +1000
@@ -34,12 +34,12 @@
#include "mmu_decl.h"
-PTE *Hash, *Hash_end;
+struct hash_pte *Hash, *Hash_end;
unsigned long Hash_size, Hash_mask;
unsigned long _SDR1;
union ubat { /* BAT register values to be loaded */
- BAT bat;
+ struct ppc_bat bat;
u32 word[2];
} BATS[8][2]; /* 8 pairs of IBAT, DBAT */
@@ -244,7 +244,7 @@ void __init MMU_init_hw(void)
cacheable_memzero(Hash, Hash_size);
_SDR1 = __pa(Hash) | SDR1_LOW_BITS;
- Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
+ Hash_end = (struct hash_pte *) ((unsigned long)Hash + Hash_size);
printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n",
total_memory >> 20, Hash_size >> 10, Hash);
Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_decl.h 2007-05-11 09:25:10.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mmu_decl.h 2007-05-11 09:25:10.000000000 +1000
@@ -39,8 +39,8 @@ extern int __map_without_bats;
extern unsigned long ioremap_base;
extern unsigned int rtas_data, rtas_size;
-struct _PTE;
-extern struct _PTE *Hash, *Hash_end;
+struct hash_pte;
+extern struct hash_pte *Hash, *Hash_end;
extern unsigned long Hash_size, Hash_mask;
extern unsigned int num_tlbcam_entries;
Index: working-2.6/include/asm-powerpc/mmu-hash64.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-hash64.h 2007-05-11 09:24:29.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-hash64.h 2007-05-11 09:25:10.000000000 +1000
@@ -103,12 +103,12 @@ extern char initial_stab[];
#ifndef __ASSEMBLY__
-typedef struct {
+struct hash_pte {
unsigned long v;
unsigned long r;
-} hpte_t;
+};
-extern hpte_t *htab_address;
+extern struct hash_pte *htab_address;
extern unsigned long htab_size_bytes;
extern unsigned long htab_hash_mask;
Index: working-2.6/arch/powerpc/mm/hash_native_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/hash_native_64.c 2007-05-11 09:24:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/hash_native_64.c 2007-05-11 09:25:10.000000000 +1000
@@ -104,7 +104,7 @@ static inline void tlbie(unsigned long v
spin_unlock(&native_tlbie_lock);
}
-static inline void native_lock_hpte(hpte_t *hptep)
+static inline void native_lock_hpte(struct hash_pte *hptep)
{
unsigned long *word = &hptep->v;
@@ -116,7 +116,7 @@ static inline void native_lock_hpte(hpte
}
}
-static inline void native_unlock_hpte(hpte_t *hptep)
+static inline void native_unlock_hpte(struct hash_pte *hptep)
{
unsigned long *word = &hptep->v;
@@ -128,7 +128,7 @@ static long native_hpte_insert(unsigned
unsigned long pa, unsigned long rflags,
unsigned long vflags, int psize)
{
- hpte_t *hptep = htab_address + hpte_group;
+ struct hash_pte *hptep = htab_address + hpte_group;
unsigned long hpte_v, hpte_r;
int i;
@@ -177,7 +177,7 @@ static long native_hpte_insert(unsigned
static long native_hpte_remove(unsigned long hpte_group)
{
- hpte_t *hptep;
+ struct hash_pte *hptep;
int i;
int slot_offset;
unsigned long hpte_v;
@@ -217,7 +217,7 @@ static long native_hpte_remove(unsigned
static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
unsigned long va, int psize, int local)
{
- hpte_t *hptep = htab_address + slot;
+ struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v, want_v;
int ret = 0;
@@ -251,7 +251,7 @@ static long native_hpte_updatepp(unsigne
static long native_hpte_find(unsigned long va, int psize)
{
- hpte_t *hptep;
+ struct hash_pte *hptep;
unsigned long hash;
unsigned long i, j;
long slot;
@@ -294,7 +294,7 @@ static void native_hpte_updateboltedpp(u
{
unsigned long vsid, va;
long slot;
- hpte_t *hptep;
+ struct hash_pte *hptep;
vsid = get_kernel_vsid(ea);
va = (vsid << 28) | (ea & 0x0fffffff);
@@ -315,7 +315,7 @@ static void native_hpte_updateboltedpp(u
static void native_hpte_invalidate(unsigned long slot, unsigned long va,
int psize, int local)
{
- hpte_t *hptep = htab_address + slot;
+ struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v;
unsigned long want_v;
unsigned long flags;
@@ -345,7 +345,7 @@ static void native_hpte_invalidate(unsig
#define LP_BITS 8
#define LP_MASK(i) ((0xFF >> (i)) << LP_SHIFT)
-static void hpte_decode(hpte_t *hpte, unsigned long slot,
+static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
int *psize, unsigned long *va)
{
unsigned long hpte_r = hpte->r;
@@ -415,7 +415,7 @@ static void hpte_decode(hpte_t *hpte, un
static void native_hpte_clear(void)
{
unsigned long slot, slots, flags;
- hpte_t *hptep = htab_address;
+ struct hash_pte *hptep = htab_address;
unsigned long hpte_v, va;
unsigned long pteg_count;
int psize;
@@ -462,7 +462,7 @@ static void native_hpte_clear(void)
static void native_flush_hash_range(unsigned long number, int local)
{
unsigned long va, hash, index, hidx, shift, slot;
- hpte_t *hptep;
+ struct hash_pte *hptep;
unsigned long hpte_v;
unsigned long want_v;
unsigned long flags;
Index: working-2.6/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/hash_utils_64.c 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/mm/hash_utils_64.c 2007-05-11 09:25:10.000000000 +1000
@@ -87,7 +87,7 @@ extern unsigned long dart_tablebase;
static unsigned long _SDR1;
struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
-hpte_t *htab_address;
+struct hash_pte *htab_address;
unsigned long htab_size_bytes;
unsigned long htab_hash_mask;
int mmu_linear_psize = MMU_PAGE_4K;
Index: working-2.6/arch/powerpc/platforms/ps3/htab.c
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/ps3/htab.c 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/ps3/htab.c 2007-05-11 09:25:10.000000000 +1000
@@ -34,7 +34,7 @@
#define DBG(fmt...) do{if(0)printk(fmt);}while(0)
#endif
-static hpte_t *htab;
+static struct hash_pte *htab;
static unsigned long htab_addr;
static unsigned char *bolttab;
static unsigned char *inusetab;
@@ -44,8 +44,8 @@ static DEFINE_SPINLOCK(ps3_bolttab_lock)
#define debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g) \
_debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g, __func__, __LINE__)
static void _debug_dump_hpte(unsigned long pa, unsigned long va,
- unsigned long group, unsigned long bitmap, hpte_t lhpte, int psize,
- unsigned long slot, const char* func, int line)
+ unsigned long group, unsigned long bitmap, struct hash_pte lhpte,
+ int psize, unsigned long slot, const char* func, int line)
{
DBG("%s:%d: pa = %lxh\n", func, line, pa);
DBG("%s:%d: lpar = %lxh\n", func, line,
@@ -63,7 +63,7 @@ static long ps3_hpte_insert(unsigned lon
unsigned long pa, unsigned long rflags, unsigned long vflags, int psize)
{
unsigned long slot;
- hpte_t lhpte;
+ struct hash_pte lhpte;
int secondary = 0;
unsigned long result;
unsigned long bitmap;
@@ -255,7 +255,7 @@ void __init ps3_hpte_init(unsigned long
ppc64_pft_size = __ilog2(htab_size);
- bitmap_size = htab_size / sizeof(hpte_t) / 8;
+ bitmap_size = htab_size / sizeof(struct hash_pte) / 8;
bolttab = __va(lmb_alloc(bitmap_size, 1));
inusetab = __va(lmb_alloc(bitmap_size, 1));
@@ -273,8 +273,8 @@ void __init ps3_map_htab(void)
result = lv1_map_htab(0, &htab_addr);
- htab = (hpte_t *)__ioremap(htab_addr, htab_size,
- pgprot_val(PAGE_READONLY_X));
+ htab = (struct hash_pte *)__ioremap(htab_addr, htab_size,
+ pgprot_val(PAGE_READONLY_X));
DBG("%s:%d: lpar %016lxh, virt %016lxh\n", __func__, __LINE__,
htab_addr, (unsigned long)htab);
Index: working-2.6/arch/powerpc/platforms/iseries/call_hpt.h
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/iseries/call_hpt.h 2007-05-11 09:28:00.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/iseries/call_hpt.h 2007-05-11 09:31:40.000000000 +1000
@@ -76,24 +76,25 @@ static inline u64 HvCallHpt_invalidateSe
return compressedStatus;
}
-static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn)
+static inline u64 HvCallHpt_findValid(struct hash_pte *hpte, u64 vpn)
{
return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
}
-static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex,
+static inline u64 HvCallHpt_findNextValid(struct hash_pte *hpte, u32 hpteIndex,
u8 bitson, u8 bitsoff)
{
return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
bitson, bitsoff);
}
-static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex)
+static inline void HvCallHpt_get(struct hash_pte *hpte, u32 hpteIndex)
{
HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
}
-static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte)
+static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit,
+ struct hash_pte *hpte)
{
HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r);
}
Index: working-2.6/arch/powerpc/platforms/iseries/htab.c
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/iseries/htab.c 2007-05-11 09:27:12.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/iseries/htab.c 2007-05-11 09:27:46.000000000 +1000
@@ -44,7 +44,7 @@ long iSeries_hpte_insert(unsigned long h
unsigned long vflags, int psize)
{
long slot;
- hpte_t lhpte;
+ struct hash_pte lhpte;
int secondary = 0;
BUG_ON(psize != MMU_PAGE_4K);
@@ -99,7 +99,7 @@ long iSeries_hpte_insert(unsigned long h
static unsigned long iSeries_hpte_getword0(unsigned long slot)
{
- hpte_t hpte;
+ struct hash_pte hpte;
HvCallHpt_get(&hpte, slot);
return hpte.v;
@@ -144,7 +144,7 @@ static long iSeries_hpte_remove(unsigned
static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
unsigned long va, int psize, int local)
{
- hpte_t hpte;
+ struct hash_pte hpte;
unsigned long want_v;
iSeries_hlock(slot);
@@ -176,7 +176,7 @@ static long iSeries_hpte_updatepp(unsign
*/
static long iSeries_hpte_find(unsigned long vpn)
{
- hpte_t hpte;
+ struct hash_pte hpte;
long slot;
/*
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 5/7] Remove a couple of unused definitions from pgtable_32.c
2007-05-10 6:04 [0/7] RFC: Assorted arch/powerpc mm related cleanups David Gibson
` (2 preceding siblings ...)
2007-05-10 6:05 ` [PATCH 7/7] Kill typedef-ed structs for hash PTEs and BATs David Gibson
@ 2007-05-10 6:05 ` David Gibson
2007-05-10 6:05 ` [PATCH 4/7] Remove the dregs of APUS support from arch/powerpc David Gibson
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: David Gibson @ 2007-05-10 6:05 UTC (permalink / raw)
To: linuxppc-dev
In arch/powerpc/mm/pgtable_32.c, the varialbe io_bat_index and the
macro is_power_of_4() no longer have any users. This patch removes
them.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/mm/pgtable_32.c | 4 ----
1 file changed, 4 deletions(-)
Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_32.c 2007-05-10 14:13:36.000000000 +1000
+++ working-2.6/arch/powerpc/mm/pgtable_32.c 2007-05-10 14:13:44.000000000 +1000
@@ -36,7 +36,6 @@
unsigned long ioremap_base;
unsigned long ioremap_bot;
EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
-int io_bat_index;
#if defined(CONFIG_6xx) || defined(CONFIG_POWER3)
#define HAVE_BATS 1
@@ -299,9 +298,6 @@ void __init mapin_ram(void)
}
}
-/* is x a power of 4? */
-#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
-
/* Scan the real Linux page tables and return a PTE pointer for
* a virtual address in a context.
* Returns true (1) if PTE was found, zero otherwise. The pointer to
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 4/7] Remove the dregs of APUS support from arch/powerpc
2007-05-10 6:04 [0/7] RFC: Assorted arch/powerpc mm related cleanups David Gibson
` (3 preceding siblings ...)
2007-05-10 6:05 ` [PATCH 5/7] Remove a couple of unused definitions from pgtable_32.c David Gibson
@ 2007-05-10 6:05 ` David Gibson
2007-05-10 6:05 ` [PATCH 2/7] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU David Gibson
2007-05-10 6:05 ` [PATCH 6/7] Start factoring pgtable-ppc32.h and pgtable-ppc64.h David Gibson
6 siblings, 0 replies; 9+ messages in thread
From: David Gibson @ 2007-05-10 6:05 UTC (permalink / raw)
To: linuxppc-dev
APUS (the Amiga Power-Up System) is not supported under arch/powerpc
and it's unlikely it ever will be. Therefore, this patch removes the
fragments of APUS support code from arch/powerpc which have been
copied from arch/ppc.
A few APUS references are left in asm-powerpc in .h files which are
still used from arch/ppc.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/Kconfig | 4 -
arch/powerpc/kernel/head_32.S | 122 ---------------------------------
arch/powerpc/kernel/irq.c | 1
arch/powerpc/mm/44x_mmu.c | 1
arch/powerpc/mm/4xx_mmu.c | 1
arch/powerpc/mm/fsl_booke_mmu.c | 1
arch/powerpc/mm/init_32.c | 1
arch/powerpc/mm/init_64.c | 1
arch/powerpc/mm/mem.c | 1
arch/powerpc/mm/mmu_context_32.c | 1
arch/powerpc/mm/mmu_decl.h | 1
arch/powerpc/mm/pgtable_32.c | 1
arch/powerpc/mm/pgtable_64.c | 1
arch/powerpc/mm/ppc_mmu_32.c | 1
arch/powerpc/mm/tlb_32.c | 1
arch/powerpc/mm/tlb_64.c | 1
arch/powerpc/platforms/Kconfig | 7 -
arch/powerpc/platforms/apus/Kconfig | 130 ------------------------------------
include/asm-powerpc/pgtable-ppc32.h | 26 -------
19 files changed, 5 insertions(+), 298 deletions(-)
Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 13:53:47.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 13:53:47.000000000 +1000
@@ -751,32 +751,6 @@ extern void paging_init(void);
#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
-/* CONFIG_APUS */
-/* For virtual address to physical address conversion */
-extern void cache_clear(__u32 addr, int length);
-extern void cache_push(__u32 addr, int length);
-extern int mm_end_of_chunk (unsigned long addr, int len);
-
-/* Values for nocacheflag and cmode */
-/* These are not used by the APUS kernel_map, but prevents
- compilation errors. */
-#define KERNELMAP_FULL_CACHING 0
-#define KERNELMAP_NOCACHE_SER 1
-#define KERNELMAP_NOCACHE_NONSER 2
-#define KERNELMAP_NO_COPYBACK 3
-
-/*
- * Map some physical address range into the kernel address space.
- */
-extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
- int nocacheflag, unsigned long *memavailp );
-
-/*
- * Set cache mode of (kernel space) address range.
- */
-extern void kernel_set_cachemode (unsigned long address, unsigned long size,
- unsigned int cmode);
-
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
#define kern_addr_valid(addr) (1)
Index: working-2.6/arch/powerpc/Kconfig
===================================================================
--- working-2.6.orig/arch/powerpc/Kconfig 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/Kconfig 2007-05-10 13:53:47.000000000 +1000
@@ -682,9 +682,9 @@ config PCI
bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
|| PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
|| MPC7448HPC2 || PPC_PS3 || PPC_HOLLY
- default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx \
+ default y if !40x && !CPM2 && !8xx && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx
- default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
+ default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
default PCI_QSPAN if !4xx && !CPM2 && 8xx
select ARCH_SUPPORTS_MSI
help
Index: working-2.6/arch/powerpc/kernel/head_32.S
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/head_32.S 2007-02-06 11:19:26.000000000 +1100
+++ working-2.6/arch/powerpc/kernel/head_32.S 2007-05-10 13:53:47.000000000 +1000
@@ -9,7 +9,6 @@
* rewritten by Paul Mackerras.
* Copyright (C) 1996 Paul Mackerras.
* MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* This file contains the low-level support and setup for the
* PowerPC platform, including trap and interrupt dispatch.
@@ -32,10 +31,6 @@
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
-#ifdef CONFIG_APUS
-#include <asm/amigappc.h>
-#endif
-
/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
#define LOAD_BAT(n, reg, RA, RB) \
/* see the comment for clear_bats() -- Cort */ \
@@ -92,11 +87,6 @@ _start:
* r4: virtual address of boot_infos_t
* r5: 0
*
- * APUS
- * r3: 'APUS'
- * r4: physical address of memory base
- * Linux/m68k style BootInfo structure at &_end.
- *
* PREP
* This is jumped to on prep systems right after the kernel is relocated
* to its proper place in memory by the boot loader. The expected layout
@@ -150,14 +140,6 @@ __start:
*/
bl early_init
-#ifdef CONFIG_APUS
-/* On APUS the __va/__pa constants need to be set to the correct
- * values before continuing.
- */
- mr r4,r30
- bl fix_mem_constants
-#endif /* CONFIG_APUS */
-
/* Switch MMU off, clear BATs and flush TLB. At this point, r3 contains
* the physical address we are running at, returned by early_init()
*/
@@ -167,7 +149,7 @@ __after_mmu_off:
bl flush_tlbs
bl initial_bats
-#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
+#if defined(CONFIG_BOOTX_TEXT)
bl setup_disp_bat
#endif
@@ -183,7 +165,6 @@ __after_mmu_off:
#endif /* CONFIG_6xx */
-#ifndef CONFIG_APUS
/*
* We need to run with _start at physical address 0.
* On CHRP, we are loaded at 0x10000 since OF on CHRP uses
@@ -196,7 +177,6 @@ __after_mmu_off:
addis r4,r3,KERNELBASE@h /* current address of _start */
cmpwi 0,r4,0 /* are we already running at 0? */
bne relocate_kernel
-#endif /* CONFIG_APUS */
/*
* we now have the 1st 16M of ram mapped with the bats.
* prep needs the mmu to be turned on here, but pmac already has it on.
@@ -881,85 +861,6 @@ _GLOBAL(copy_and_flush)
addi r6,r6,4
blr
-#ifdef CONFIG_APUS
-/*
- * On APUS the physical base address of the kernel is not known at compile
- * time, which means the __pa/__va constants used are incorrect. In the
- * __init section is recorded the virtual addresses of instructions using
- * these constants, so all that has to be done is fix these before
- * continuing the kernel boot.
- *
- * r4 = The physical address of the kernel base.
- */
-fix_mem_constants:
- mr r10,r4
- addis r10,r10,-KERNELBASE@h /* virt_to_phys constant */
- neg r11,r10 /* phys_to_virt constant */
-
- lis r12,__vtop_table_begin@h
- ori r12,r12,__vtop_table_begin@l
- add r12,r12,r10 /* table begin phys address */
- lis r13,__vtop_table_end@h
- ori r13,r13,__vtop_table_end@l
- add r13,r13,r10 /* table end phys address */
- subi r12,r12,4
- subi r13,r13,4
-1: lwzu r14,4(r12) /* virt address of instruction */
- add r14,r14,r10 /* phys address of instruction */
- lwz r15,0(r14) /* instruction, now insert top */
- rlwimi r15,r10,16,16,31 /* half of vp const in low half */
- stw r15,0(r14) /* of instruction and restore. */
- dcbst r0,r14 /* write it to memory */
- sync
- icbi r0,r14 /* flush the icache line */
- cmpw r12,r13
- bne 1b
- sync /* additional sync needed on g4 */
- isync
-
-/*
- * Map the memory where the exception handlers will
- * be copied to when hash constants have been patched.
- */
-#ifdef CONFIG_APUS_FAST_EXCEPT
- lis r8,0xfff0
-#else
- lis r8,0
-#endif
- ori r8,r8,0x2 /* 128KB, supervisor */
- mtspr SPRN_DBAT3U,r8
- mtspr SPRN_DBAT3L,r8
-
- lis r12,__ptov_table_begin@h
- ori r12,r12,__ptov_table_begin@l
- add r12,r12,r10 /* table begin phys address */
- lis r13,__ptov_table_end@h
- ori r13,r13,__ptov_table_end@l
- add r13,r13,r10 /* table end phys address */
- subi r12,r12,4
- subi r13,r13,4
-1: lwzu r14,4(r12) /* virt address of instruction */
- add r14,r14,r10 /* phys address of instruction */
- lwz r15,0(r14) /* instruction, now insert top */
- rlwimi r15,r11,16,16,31 /* half of pv const in low half*/
- stw r15,0(r14) /* of instruction and restore. */
- dcbst r0,r14 /* write it to memory */
- sync
- icbi r0,r14 /* flush the icache line */
- cmpw r12,r13
- bne 1b
-
- sync /* additional sync needed on g4 */
- isync /* No speculative loading until now */
- blr
-
-/***********************************************************************
- * Please note that on APUS the exception handlers are located at the
- * physical address 0xfff0000. For this reason, the exception handlers
- * cannot use relative branches to access the code below.
- ***********************************************************************/
-#endif /* CONFIG_APUS */
-
#ifdef CONFIG_SMP
#ifdef CONFIG_GEMINI
.globl __secondary_start_gemini
@@ -1135,19 +1036,6 @@ start_here:
bl __save_cpu_setup
bl MMU_init
-#ifdef CONFIG_APUS
- /* Copy exception code to exception vector base on APUS. */
- lis r4,KERNELBASE@h
-#ifdef CONFIG_APUS_FAST_EXCEPT
- lis r3,0xfff0 /* Copy to 0xfff00000 */
-#else
- lis r3,0 /* Copy to 0x00000000 */
-#endif
- li r5,0x4000 /* # bytes of memory to copy */
- li r6,0
- bl copy_and_flush /* copy the first 0x4000 bytes */
-#endif /* CONFIG_APUS */
-
/*
* Go back to running unmapped so we can load up new values
* for SDR1 (hash table pointer) and the segment registers
@@ -1324,11 +1212,7 @@ initial_bats:
#else
ori r8,r8,2 /* R/W access */
#endif /* CONFIG_SMP */
-#ifdef CONFIG_APUS
- ori r11,r11,BL_8M<<2|0x2 /* set up 8MB BAT registers for 604 */
-#else
ori r11,r11,BL_256M<<2|0x2 /* set up BAT registers for 604 */
-#endif /* CONFIG_APUS */
mtspr SPRN_DBAT0L,r8 /* N.B. 6xx (not 601) have valid */
mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */
@@ -1338,7 +1222,7 @@ initial_bats:
blr
-#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
+#ifdef CONFIG_BOOTX_TEXT
setup_disp_bat:
/*
* setup the display bat prepared for us in prom.c
@@ -1362,7 +1246,7 @@ setup_disp_bat:
1: mtspr SPRN_IBAT3L,r8
mtspr SPRN_IBAT3U,r11
blr
-#endif /* !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT) */
+#endif /* CONFIG_BOOTX_TEXT */
#ifdef CONFIG_8260
/* Jump into the system reset for the rom.
Index: working-2.6/arch/powerpc/kernel/irq.c
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/irq.c 2007-05-08 14:58:06.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/irq.c 2007-05-10 13:53:47.000000000 +1000
@@ -7,7 +7,6 @@
* Copyright (C) 1996-2001 Cort Dougan
* Adapted for Power Macintosh by Paul Mackerras
* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
Index: working-2.6/arch/powerpc/mm/44x_mmu.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/44x_mmu.c 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/arch/powerpc/mm/44x_mmu.c 2007-05-10 13:53:47.000000000 +1000
@@ -12,7 +12,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/4xx_mmu.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/4xx_mmu.c 2006-12-08 10:42:48.000000000 +1100
+++ working-2.6/arch/powerpc/mm/4xx_mmu.c 2007-05-10 13:53:47.000000000 +1000
@@ -9,7 +9,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/fsl_booke_mmu.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/fsl_booke_mmu.c 2006-12-08 10:42:48.000000000 +1100
+++ working-2.6/arch/powerpc/mm/fsl_booke_mmu.c 2007-05-10 13:53:47.000000000 +1000
@@ -14,7 +14,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/init_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/init_32.c 2007-04-26 13:57:24.000000000 +1000
+++ working-2.6/arch/powerpc/mm/init_32.c 2007-05-10 13:53:47.000000000 +1000
@@ -5,7 +5,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
* PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
*
* Derived from "arch/i386/mm/init.c"
Index: working-2.6/arch/powerpc/mm/init_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/init_64.c 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/mm/init_64.c 2007-05-10 13:53:47.000000000 +1000
@@ -5,7 +5,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/mem.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mem.c 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mem.c 2007-05-10 13:53:47.000000000 +1000
@@ -5,7 +5,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
* PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
*
* Derived from "arch/i386/mm/init.c"
Index: working-2.6/arch/powerpc/mm/mmu_context_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_context_32.c 2006-12-08 10:42:48.000000000 +1100
+++ working-2.6/arch/powerpc/mm/mmu_context_32.c 2007-05-10 13:53:47.000000000 +1000
@@ -11,7 +11,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_decl.h 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mmu_decl.h 2007-05-10 13:53:47.000000000 +1000
@@ -8,7 +8,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/pgtable_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_64.c 2007-02-19 11:05:31.000000000 +1100
+++ working-2.6/arch/powerpc/mm/pgtable_64.c 2007-05-10 13:53:47.000000000 +1000
@@ -7,7 +7,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/ppc_mmu_32.c 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/mm/ppc_mmu_32.c 2007-05-10 13:53:47.000000000 +1000
@@ -11,7 +11,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/tlb_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/tlb_32.c 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/mm/tlb_32.c 2007-05-10 13:53:47.000000000 +1000
@@ -11,7 +11,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/tlb_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/tlb_64.c 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/mm/tlb_64.c 2007-05-10 13:53:47.000000000 +1000
@@ -8,7 +8,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/platforms/Kconfig
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/Kconfig 2007-05-08 15:07:45.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/Kconfig 2007-05-10 13:53:47.000000000 +1000
@@ -16,13 +16,6 @@ config EMBEDDED6xx
bool "Embedded 6xx/7xx/7xxx-based board"
depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
-config APUS
- bool "Amiga-APUS"
- depends on PPC32 && BROKEN
- help
- Select APUS if configuring for a PowerUP Amiga.
- More information is available at:
- <http://linux-apus.sourceforge.net/>.
endchoice
source "arch/powerpc/platforms/pseries/Kconfig"
Index: working-2.6/arch/powerpc/platforms/apus/Kconfig
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/apus/Kconfig 2006-12-08 10:42:48.000000000 +1100
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,130 +0,0 @@
-
-config AMIGA
- bool
- depends on APUS
- default y
- help
- This option enables support for the Amiga series of computers.
-
-config ZORRO
- bool
- depends on APUS
- default y
- help
- This enables support for the Zorro bus in the Amiga. If you have
- expansion cards in your Amiga that conform to the Amiga
- AutoConfig(tm) specification, say Y, otherwise N. Note that even
- expansion cards that do not fit in the Zorro slots but fit in e.g.
- the CPU slot may fall in this category, so you have to say Y to let
- Linux use these.
-
-config ABSTRACT_CONSOLE
- bool
- depends on APUS
- default y
-
-config APUS_FAST_EXCEPT
- bool
- depends on APUS
- default y
-
-config AMIGA_PCMCIA
- bool "Amiga 1200/600 PCMCIA support"
- depends on APUS && EXPERIMENTAL
- help
- Include support in the kernel for pcmcia on Amiga 1200 and Amiga
- 600. If you intend to use pcmcia cards say Y; otherwise say N.
-
-config AMIGA_BUILTIN_SERIAL
- tristate "Amiga builtin serial support"
- depends on APUS
- help
- If you want to use your Amiga's built-in serial port in Linux,
- answer Y.
-
- To compile this driver as a module, choose M here.
-
-config GVPIOEXT
- tristate "GVP IO-Extender support"
- depends on APUS
- help
- If you want to use a GVP IO-Extender serial card in Linux, say Y.
- Otherwise, say N.
-
-config GVPIOEXT_LP
- tristate "GVP IO-Extender parallel printer support"
- depends on GVPIOEXT
- help
- Say Y to enable driving a printer from the parallel port on your
- GVP IO-Extender card, N otherwise.
-
-config GVPIOEXT_PLIP
- tristate "GVP IO-Extender PLIP support"
- depends on GVPIOEXT
- help
- Say Y to enable doing IP over the parallel port on your GVP
- IO-Extender card, N otherwise.
-
-config MULTIFACE_III_TTY
- tristate "Multiface Card III serial support"
- depends on APUS
- help
- If you want to use a Multiface III card's serial port in Linux,
- answer Y.
-
- To compile this driver as a module, choose M here.
-
-config A2232
- tristate "Commodore A2232 serial support (EXPERIMENTAL)"
- depends on EXPERIMENTAL && APUS
- ---help---
- This option supports the 2232 7-port serial card shipped with the
- Amiga 2000 and other Zorro-bus machines, dating from 1989. At
- a max of 19,200 bps, the ports are served by a 6551 ACIA UART chip
- each, plus a 8520 CIA, and a master 6502 CPU and buffer as well. The
- ports were connected with 8 pin DIN connectors on the card bracket,
- for which 8 pin to DB25 adapters were supplied. The card also had
- jumpers internally to toggle various pinning configurations.
-
- This driver can be built as a module; but then "generic_serial"
- will also be built as a module. This has to be loaded before
- "ser_a2232". If you want to do this, answer M here.
-
-config WHIPPET_SERIAL
- tristate "Hisoft Whippet PCMCIA serial support"
- depends on AMIGA_PCMCIA
- help
- HiSoft has a web page at <http://www.hisoft.co.uk/>, but there
- is no listing for the Whippet in their Amiga section.
-
-config APNE
- tristate "PCMCIA NE2000 support"
- depends on AMIGA_PCMCIA
- help
- If you have a PCMCIA NE2000 compatible adapter, say Y. Otherwise,
- say N.
-
- To compile this driver as a module, choose M here: the
- module will be called apne.
-
-config SERIAL_CONSOLE
- bool "Support for serial port console"
- depends on APUS && (AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y)
-
-config HEARTBEAT
- bool "Use power LED as a heartbeat"
- depends on APUS
- help
- Use the power-on LED on your machine as a load meter. The exact
- behavior is platform-dependent, but normally the flash frequency is
- a hyperbolic function of the 5-minute load average.
-
-config PROC_HARDWARE
- bool "/proc/hardware support"
- depends on APUS
-
-source "drivers/zorro/Kconfig"
-
-config PCI_PERMEDIA
- bool "PCI for Permedia2"
- depends on !4xx && !8xx && APUS
Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_32.c 2007-05-10 13:57:21.000000000 +1000
+++ working-2.6/arch/powerpc/mm/pgtable_32.c 2007-05-10 13:57:28.000000000 +1000
@@ -8,7 +8,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 2/7] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU
2007-05-10 6:04 [0/7] RFC: Assorted arch/powerpc mm related cleanups David Gibson
` (4 preceding siblings ...)
2007-05-10 6:05 ` [PATCH 4/7] Remove the dregs of APUS support from arch/powerpc David Gibson
@ 2007-05-10 6:05 ` David Gibson
2007-05-10 6:05 ` [PATCH 6/7] Start factoring pgtable-ppc32.h and pgtable-ppc64.h David Gibson
6 siblings, 0 replies; 9+ messages in thread
From: David Gibson @ 2007-05-10 6:05 UTC (permalink / raw)
To: linuxppc-dev
arch/powerpc still relies on asm-ppc/mmu.h for most 32-bit MMU types.
This patch is another step towards fixing this. It takes the portions
of asm-ppc/mmu.h related to the "classic" 32-bit hash page table MMU
which are still relevant in arch/powerpc and puts them in a new
asm-powerpc/mmu-hash32.h, included when appropriate from
asm-powerpc/mmu.h.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/asm-powerpc/mmu-hash32.h | 91 +++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/mmu.h | 3 +
2 files changed, 94 insertions(+)
Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/include/asm-powerpc/mmu-hash32.h 2007-05-09 15:45:31.000000000 +1000
@@ -0,0 +1,91 @@
+#ifndef _ASM_POWERPC_MMU_HASH32_H_
+#define _ASM_POWERPC_MMU_HASH32_H_
+/*
+ * 32-bit hash table MMU support
+ */
+
+/*
+ * BATs
+ */
+
+/* Block size masks */
+#define BL_128K 0x000
+#define BL_256K 0x001
+#define BL_512K 0x003
+#define BL_1M 0x007
+#define BL_2M 0x00F
+#define BL_4M 0x01F
+#define BL_8M 0x03F
+#define BL_16M 0x07F
+#define BL_32M 0x0FF
+#define BL_64M 0x1FF
+#define BL_128M 0x3FF
+#define BL_256M 0x7FF
+
+/* BAT Access Protection */
+#define BPP_XX 0x00 /* No access */
+#define BPP_RX 0x01 /* Read only */
+#define BPP_RW 0x02 /* Read/write */
+
+#ifndef __ASSEMBLY__
+typedef struct _BAT {
+ struct {
+ unsigned long bepi:15; /* Effective page index (virtual address) */
+ unsigned long :4; /* Unused */
+ unsigned long bl:11; /* Block size mask */
+ unsigned long vs:1; /* Supervisor valid */
+ unsigned long vp:1; /* User valid */
+ } batu; /* Upper register */
+ struct {
+ unsigned long brpn:15; /* Real page index (physical address) */
+ unsigned long :10; /* Unused */
+ unsigned long w:1; /* Write-thru cache */
+ unsigned long i:1; /* Cache inhibit */
+ unsigned long m:1; /* Memory coherence */
+ unsigned long g:1; /* Guarded (MBZ in IBAT) */
+ unsigned long :1; /* Unused */
+ unsigned long pp:2; /* Page access protections */
+ } batl; /* Lower register */
+} BAT;
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Hash table
+ */
+
+/* Values for PP (assumes Ks=0, Kp=1) */
+#define PP_RWXX 0 /* Supervisor read/write, User none */
+#define PP_RWRX 1 /* Supervisor read/write, User read */
+#define PP_RWRW 2 /* Supervisor read/write, User read/write */
+#define PP_RXRX 3 /* Supervisor read, User read */
+
+#ifndef __ASSEMBLY__
+
+/* Hardware Page Table Entry */
+typedef struct _PTE {
+ unsigned long v:1; /* Entry is valid */
+ unsigned long vsid:24; /* Virtual segment identifier */
+ unsigned long h:1; /* Hash algorithm indicator */
+ unsigned long api:6; /* Abbreviated page index */
+ unsigned long rpn:20; /* Real (physical) page number */
+ unsigned long :3; /* Unused */
+ unsigned long r:1; /* Referenced */
+ unsigned long c:1; /* Changed */
+ unsigned long w:1; /* Write-thru cache mode */
+ unsigned long i:1; /* Cache inhibited */
+ unsigned long m:1; /* Memory coherence */
+ unsigned long g:1; /* Guarded */
+ unsigned long :1; /* Unused */
+ unsigned long pp:2; /* Page protection */
+} PTE;
+
+typedef struct {
+ unsigned long id;
+ unsigned long vdso_base;
+} mm_context_t;
+
+typedef unsigned long phys_addr_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_POWERPC_MMU_HASH32_H_ */
Index: working-2.6/include/asm-powerpc/mmu.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu.h 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu.h 2007-05-09 15:29:12.000000000 +1000
@@ -5,6 +5,9 @@
#ifdef CONFIG_PPC64
/* 64-bit classic hash table MMU */
# include <asm/mmu-hash64.h>
+#elif defined(CONFIG_PPC_STD_MMU)
+/* 32-bit classic hash table MMU */
+# include <asm/mmu-hash32.h>
#elif defined(CONFIG_44x)
/* 44x-style software loaded TLB */
# include <asm/mmu-44x.h>
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 6/7] Start factoring pgtable-ppc32.h and pgtable-ppc64.h
2007-05-10 6:04 [0/7] RFC: Assorted arch/powerpc mm related cleanups David Gibson
` (5 preceding siblings ...)
2007-05-10 6:05 ` [PATCH 2/7] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU David Gibson
@ 2007-05-10 6:05 ` David Gibson
6 siblings, 0 replies; 9+ messages in thread
From: David Gibson @ 2007-05-10 6:05 UTC (permalink / raw)
To: linuxppc-dev
This patch factors some things defined in both pgtable-ppc32.h and
pgtable-ppc64.h into the common part of asm-powerpc/pgtable.h. These
are all things which have essentially identical definitions, and which
by their nature are very unlikely ever to need different definitions
in the two cases.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/asm-powerpc/pgtable-ppc32.h | 18 ------------------
include/asm-powerpc/pgtable-ppc64.h | 25 -------------------------
include/asm-powerpc/pgtable.h | 21 +++++++++++++++++++++
3 files changed, 21 insertions(+), 43 deletions(-)
Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 15:18:49.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 15:18:49.000000000 +1000
@@ -488,14 +488,6 @@ extern unsigned long bad_call_to_PMD_PAG
#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\
pgprot_val(prot))
#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[1024];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-
#endif /* __ASSEMBLY__ */
#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
@@ -730,10 +722,6 @@ extern pgprot_t phys_mem_access_prot(str
#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
-extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
-
-extern void paging_init(void);
-
/*
* Encode and decode a swap entry.
* Note that the bits we use in a PTE for representing a swap entry
@@ -751,12 +739,6 @@ extern void paging_init(void);
#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-#define kern_addr_valid(addr) (1)
-
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
/*
* No page table caches to initialise
*/
Index: working-2.6/include/asm-powerpc/pgtable-ppc64.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc64.h 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc64.h 2007-05-10 15:18:49.000000000 +1000
@@ -134,16 +134,6 @@ struct mm_struct;
#define __S110 PAGE_SHARED_X
#define __S111 PAGE_SHARED_X
-#ifndef __ASSEMBLY__
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-#endif /* __ASSEMBLY__ */
-
#ifdef CONFIG_HUGETLB_PAGE
#define HAVE_ARCH_UNMAPPED_AREA
@@ -438,10 +428,6 @@ extern pgprot_t phys_mem_access_prot(str
#define pgd_ERROR(e) \
printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-extern pgd_t swapper_pg_dir[];
-
-extern void paging_init(void);
-
/* Encode and de-code a swap entry */
#define __swp_type(entry) (((entry).val >> 1) & 0x3f)
#define __swp_offset(entry) ((entry).val >> 8)
@@ -452,17 +438,6 @@ extern void paging_init(void);
#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
-/*
- * kern_addr_valid is intended to indicate whether an address is a valid
- * kernel address. Most 32-bit archs define it as always true (like this)
- * but most 64-bit archs actually perform a test. What should we do here?
- * The only use is in fs/ncpfs/dir.c
- */
-#define kern_addr_valid(addr) (1)
-
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
void pgtable_cache_init(void);
/*
Index: working-2.6/include/asm-powerpc/pgtable.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable.h 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable.h 2007-05-10 15:51:16.000000000 +1000
@@ -9,6 +9,27 @@
#endif
#ifndef __ASSEMBLY__
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+extern unsigned long empty_zero_page[];
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+
+extern pgd_t swapper_pg_dir[];
+
+extern void paging_init(void);
+
+/*
+ * kern_addr_valid is intended to indicate whether an address is a valid
+ * kernel address. Most 32-bit archs define it as always true (like this)
+ * but most 64-bit archs actually perform a test. What should we do here?
+ */
+#define kern_addr_valid(addr) (1)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
+ remap_pfn_range(vma, vaddr, pfn, size, prot)
+
#include <asm-generic/pgtable.h>
#endif /* __ASSEMBLY__ */
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