* [0/13] Queued patches for 2.6.13
@ 2007-06-13 4:50 David Gibson
2007-06-13 4:52 ` [PATCH 2/13] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU David Gibson
` (14 more replies)
0 siblings, 15 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:50 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Hi Paul,
Here's my current queue of patches which I'm hoping will go in for
2.6.13. If they could go into an appropriate branch of powerpc.git in
the meantime that would be great.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 2/13] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-13 4:52 ` [PATCH 4/13] Remove the dregs of APUS support from arch/powerpc David Gibson
` (13 subsequent siblings)
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
arch/powerpc still relies on asm-ppc/mmu.h for most 32-bit MMU types.
This patch is another step towards fixing this. It takes the portions
of asm-ppc/mmu.h related to the "classic" 32-bit hash page table MMU
which are still relevant in arch/powerpc and puts them in a new
asm-powerpc/mmu-hash32.h, included when appropriate from
asm-powerpc/mmu.h.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/asm-powerpc/mmu-hash32.h | 91 +++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/mmu.h | 3 +
2 files changed, 94 insertions(+)
Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/include/asm-powerpc/mmu-hash32.h 2007-05-09 15:45:31.000000000 +1000
@@ -0,0 +1,91 @@
+#ifndef _ASM_POWERPC_MMU_HASH32_H_
+#define _ASM_POWERPC_MMU_HASH32_H_
+/*
+ * 32-bit hash table MMU support
+ */
+
+/*
+ * BATs
+ */
+
+/* Block size masks */
+#define BL_128K 0x000
+#define BL_256K 0x001
+#define BL_512K 0x003
+#define BL_1M 0x007
+#define BL_2M 0x00F
+#define BL_4M 0x01F
+#define BL_8M 0x03F
+#define BL_16M 0x07F
+#define BL_32M 0x0FF
+#define BL_64M 0x1FF
+#define BL_128M 0x3FF
+#define BL_256M 0x7FF
+
+/* BAT Access Protection */
+#define BPP_XX 0x00 /* No access */
+#define BPP_RX 0x01 /* Read only */
+#define BPP_RW 0x02 /* Read/write */
+
+#ifndef __ASSEMBLY__
+typedef struct _BAT {
+ struct {
+ unsigned long bepi:15; /* Effective page index (virtual address) */
+ unsigned long :4; /* Unused */
+ unsigned long bl:11; /* Block size mask */
+ unsigned long vs:1; /* Supervisor valid */
+ unsigned long vp:1; /* User valid */
+ } batu; /* Upper register */
+ struct {
+ unsigned long brpn:15; /* Real page index (physical address) */
+ unsigned long :10; /* Unused */
+ unsigned long w:1; /* Write-thru cache */
+ unsigned long i:1; /* Cache inhibit */
+ unsigned long m:1; /* Memory coherence */
+ unsigned long g:1; /* Guarded (MBZ in IBAT) */
+ unsigned long :1; /* Unused */
+ unsigned long pp:2; /* Page access protections */
+ } batl; /* Lower register */
+} BAT;
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Hash table
+ */
+
+/* Values for PP (assumes Ks=0, Kp=1) */
+#define PP_RWXX 0 /* Supervisor read/write, User none */
+#define PP_RWRX 1 /* Supervisor read/write, User read */
+#define PP_RWRW 2 /* Supervisor read/write, User read/write */
+#define PP_RXRX 3 /* Supervisor read, User read */
+
+#ifndef __ASSEMBLY__
+
+/* Hardware Page Table Entry */
+typedef struct _PTE {
+ unsigned long v:1; /* Entry is valid */
+ unsigned long vsid:24; /* Virtual segment identifier */
+ unsigned long h:1; /* Hash algorithm indicator */
+ unsigned long api:6; /* Abbreviated page index */
+ unsigned long rpn:20; /* Real (physical) page number */
+ unsigned long :3; /* Unused */
+ unsigned long r:1; /* Referenced */
+ unsigned long c:1; /* Changed */
+ unsigned long w:1; /* Write-thru cache mode */
+ unsigned long i:1; /* Cache inhibited */
+ unsigned long m:1; /* Memory coherence */
+ unsigned long g:1; /* Guarded */
+ unsigned long :1; /* Unused */
+ unsigned long pp:2; /* Page protection */
+} PTE;
+
+typedef struct {
+ unsigned long id;
+ unsigned long vdso_base;
+} mm_context_t;
+
+typedef unsigned long phys_addr_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_POWERPC_MMU_HASH32_H_ */
Index: working-2.6/include/asm-powerpc/mmu.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu.h 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu.h 2007-05-09 15:29:12.000000000 +1000
@@ -5,6 +5,9 @@
#ifdef CONFIG_PPC64
/* 64-bit classic hash table MMU */
# include <asm/mmu-hash64.h>
+#elif defined(CONFIG_PPC_STD_MMU)
+/* 32-bit classic hash table MMU */
+# include <asm/mmu-hash32.h>
#elif defined(CONFIG_44x)
/* 44x-style software loaded TLB */
# include <asm/mmu-44x.h>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 3/13] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
2007-06-13 4:52 ` [PATCH 2/13] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU David Gibson
2007-06-13 4:52 ` [PATCH 4/13] Remove the dregs of APUS support from arch/powerpc David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-16 0:55 ` Benjamin Herrenschmidt
2007-06-13 4:52 ` [PATCH 1/13] Split low-level OF-related bootloader code into separate files David Gibson
` (11 subsequent siblings)
14 siblings, 1 reply; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
These old-fashioned IO mapping functions no longer have any callers in
code which remains relevant on arch/powerpc. Therefore, this patch
removes them from arch/powerpc.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/mm/pgtable_32.c | 118 ------------------------------------
include/asm-powerpc/io.h | 7 --
include/asm-powerpc/pgtable-ppc32.h | 2
3 files changed, 127 deletions(-)
Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_32.c 2007-05-10 13:48:49.000000000 +1000
+++ working-2.6/arch/powerpc/mm/pgtable_32.c 2007-05-10 13:52:29.000000000 +1000
@@ -303,48 +303,6 @@ void __init mapin_ram(void)
/* is x a power of 4? */
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
-/*
- * Set up a mapping for a block of I/O.
- * virt, phys, size must all be page-aligned.
- * This should only be called before ioremap is called.
- */
-void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
- unsigned int size, int flags)
-{
- int i;
-
- if (virt > KERNELBASE && virt < ioremap_bot)
- ioremap_bot = ioremap_base = virt;
-
-#ifdef HAVE_BATS
- /*
- * Use a BAT for this if possible...
- */
- if (io_bat_index < 2 && is_power_of_2(size)
- && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
- setbat(io_bat_index, virt, phys, size, flags);
- ++io_bat_index;
- return;
- }
-#endif /* HAVE_BATS */
-
-#ifdef HAVE_TLBCAM
- /*
- * Use a CAM for this if possible...
- */
- if (tlbcam_index < num_tlbcam_entries && is_power_of_4(size)
- && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
- settlbcam(tlbcam_index, virt, phys, size, flags, 0);
- ++tlbcam_index;
- return;
- }
-#endif /* HAVE_TLBCAM */
-
- /* No BATs available, put it in the page tables. */
- for (i = 0; i < size; i += PAGE_SIZE)
- map_page(virt + i, phys + i, flags);
-}
-
/* Scan the real Linux page tables and return a PTE pointer for
* a virtual address in a context.
* Returns true (1) if PTE was found, zero otherwise. The pointer to
@@ -379,82 +337,6 @@ get_pteptr(struct mm_struct *mm, unsigne
return(retval);
}
-/* Find physical address for this virtual address. Normally used by
- * I/O functions, but anyone can call it.
- */
-unsigned long iopa(unsigned long addr)
-{
- unsigned long pa;
-
- /* I don't know why this won't work on PMacs or CHRP. It
- * appears there is some bug, or there is some implicit
- * mapping done not properly represented by BATs or in page
- * tables.......I am actively working on resolving this, but
- * can't hold up other stuff. -- Dan
- */
- pte_t *pte;
- struct mm_struct *mm;
-
- /* Check the BATs */
- pa = v_mapped_by_bats(addr);
- if (pa)
- return pa;
-
- /* Allow mapping of user addresses (within the thread)
- * for DMA if necessary.
- */
- if (addr < TASK_SIZE)
- mm = current->mm;
- else
- mm = &init_mm;
-
- pa = 0;
- if (get_pteptr(mm, addr, &pte, NULL)) {
- pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK);
- pte_unmap(pte);
- }
-
- return(pa);
-}
-
-/* This is will find the virtual address for a physical one....
- * Swiped from APUS, could be dangerous :-).
- * This is only a placeholder until I really find a way to make this
- * work. -- Dan
- */
-unsigned long
-mm_ptov (unsigned long paddr)
-{
- unsigned long ret;
-#if 0
- if (paddr < 16*1024*1024)
- ret = ZTWO_VADDR(paddr);
- else {
- int i;
-
- for (i = 0; i < kmap_chunk_count;){
- unsigned long phys = kmap_chunks[i++];
- unsigned long size = kmap_chunks[i++];
- unsigned long virt = kmap_chunks[i++];
- if (paddr >= phys
- && paddr < (phys + size)){
- ret = virt + paddr - phys;
- goto exit;
- }
- }
-
- ret = (unsigned long) __va(paddr);
- }
-exit:
-#ifdef DEBUGPV
- printk ("PTOV(%lx)=%lx\n", paddr, ret);
-#endif
-#else
- ret = (unsigned long)paddr + KERNELBASE;
-#endif
- return ret;
-}
-
#ifdef CONFIG_DEBUG_PAGEALLOC
static int __change_page_attr(struct page *page, pgprot_t prot)
Index: working-2.6/include/asm-powerpc/io.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/io.h 2007-05-10 13:49:20.000000000 +1000
+++ working-2.6/include/asm-powerpc/io.h 2007-05-10 13:52:41.000000000 +1000
@@ -636,13 +636,6 @@ extern int __iounmap_explicit(volatile v
extern void __iomem * reserve_phb_iospace(unsigned long size);
-/* Those are more 32 bits only functions */
-extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
-extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
- unsigned int size, int flags);
-
-
/*
* When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation
* which needs some additional definitions here. They basically allow PIO
Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 13:49:35.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc32.h 2007-05-10 13:52:49.000000000 +1000
@@ -756,8 +756,6 @@ extern void paging_init(void);
extern void cache_clear(__u32 addr, int length);
extern void cache_push(__u32 addr, int length);
extern int mm_end_of_chunk (unsigned long addr, int len);
-extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
/* Values for nocacheflag and cmode */
/* These are not used by the APUS kernel_map, but prevents
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 1/13] Split low-level OF-related bootloader code into separate files
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (2 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 3/13] Abolish iopa(), mm_ptov(), io_block_mapping() " David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-13 4:52 ` [PATCH 6/13] Start factoring pgtable-ppc32.h and pgtable-ppc64.h David Gibson
` (10 subsequent siblings)
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Currently, all OF-related code in the bootloader is contained in of.c.
of.c also provides the platform specific things necessary to boot on
an OF platform.
However, there are platforms (such as PReP) which can include an OF
implementation, but are not bootable as pure OF systems. For use by
such platforms, this patch splits out the low-level parts of the OF
code (call_prom() and various wrappers thereof) into a new oflib.c
file. In addition, the code related to bootwrapper console output via
OF are moved to a new ofconsole.c file. Both these files are included
in the wrapper.a library where they can be used by both full-OF and
partial OF platforms.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/boot/Makefile | 2
arch/powerpc/boot/of.c | 188 +-----------------------------------------
arch/powerpc/boot/of.h | 15 +++
arch/powerpc/boot/ofconsole.c | 45 ++++++++++
arch/powerpc/boot/oflib.c | 172 ++++++++++++++++++++++++++++++++++++++
5 files changed, 240 insertions(+), 182 deletions(-)
Index: working-2.6/arch/powerpc/boot/of.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/of.h 2007-05-29 16:40:25.000000000 +1000
@@ -0,0 +1,15 @@
+#ifndef _PPC_BOOT_OF_H_
+#define _PPC_BOOT_OF_H_
+
+typedef void *phandle;
+typedef void *ihandle;
+
+void of_init(void *promptr);
+int of_call_prom(const char *service, int nargs, int nret, ...);
+void *of_claim(unsigned long virt, unsigned long size, unsigned long align);
+void of_exit(void);
+
+/* Console functions */
+void of_console_init(void);
+
+#endif /* _PPC_BOOT_OF_H_ */
Index: working-2.6/arch/powerpc/boot/oflib.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/oflib.c 2007-05-29 16:32:05.000000000 +1000
@@ -0,0 +1,172 @@
+/*
+ * Copyright (C) Paul Mackerras 1997.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+
+#include "of.h"
+
+static int (*prom) (void *);
+
+void of_init(void *promptr)
+{
+ prom = (int (*)(void *))promptr;
+}
+
+int of_call_prom(const char *service, int nargs, int nret, ...)
+{
+ int i;
+ struct prom_args {
+ const char *service;
+ int nargs;
+ int nret;
+ unsigned int args[12];
+ } args;
+ va_list list;
+
+ args.service = service;
+ args.nargs = nargs;
+ args.nret = nret;
+
+ va_start(list, nret);
+ for (i = 0; i < nargs; i++)
+ args.args[i] = va_arg(list, unsigned int);
+ va_end(list);
+
+ for (i = 0; i < nret; i++)
+ args.args[nargs+i] = 0;
+
+ if (prom(&args) < 0)
+ return -1;
+
+ return (nret > 0)? args.args[nargs]: 0;
+}
+
+static int of_call_prom_ret(const char *service, int nargs, int nret,
+ unsigned int *rets, ...)
+{
+ int i;
+ struct prom_args {
+ const char *service;
+ int nargs;
+ int nret;
+ unsigned int args[12];
+ } args;
+ va_list list;
+
+ args.service = service;
+ args.nargs = nargs;
+ args.nret = nret;
+
+ va_start(list, rets);
+ for (i = 0; i < nargs; i++)
+ args.args[i] = va_arg(list, unsigned int);
+ va_end(list);
+
+ for (i = 0; i < nret; i++)
+ args.args[nargs+i] = 0;
+
+ if (prom(&args) < 0)
+ return -1;
+
+ if (rets != (void *) 0)
+ for (i = 1; i < nret; ++i)
+ rets[i-1] = args.args[nargs+i];
+
+ return (nret > 0)? args.args[nargs]: 0;
+}
+
+/* returns true if s2 is a prefix of s1 */
+static int string_match(const char *s1, const char *s2)
+{
+ for (; *s2; ++s2)
+ if (*s1++ != *s2)
+ return 0;
+ return 1;
+}
+
+/*
+ * Older OF's require that when claiming a specific range of addresses,
+ * we claim the physical space in the /memory node and the virtual
+ * space in the chosen mmu node, and then do a map operation to
+ * map virtual to physical.
+ */
+static int need_map = -1;
+static ihandle chosen_mmu;
+static phandle memory;
+
+static int check_of_version(void)
+{
+ phandle oprom, chosen;
+ char version[64];
+
+ oprom = finddevice("/openprom");
+ if (oprom == (phandle) -1)
+ return 0;
+ if (getprop(oprom, "model", version, sizeof(version)) <= 0)
+ return 0;
+ version[sizeof(version)-1] = 0;
+ printf("OF version = '%s'\r\n", version);
+ if (!string_match(version, "Open Firmware, 1.")
+ && !string_match(version, "FirmWorks,3."))
+ return 0;
+ chosen = finddevice("/chosen");
+ if (chosen == (phandle) -1) {
+ chosen = finddevice("/chosen@0");
+ if (chosen == (phandle) -1) {
+ printf("no chosen\n");
+ return 0;
+ }
+ }
+ if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) {
+ printf("no mmu\n");
+ return 0;
+ }
+ memory = (ihandle) of_call_prom("open", 1, 1, "/memory");
+ if (memory == (ihandle) -1) {
+ memory = (ihandle) of_call_prom("open", 1, 1, "/memory@0");
+ if (memory == (ihandle) -1) {
+ printf("no memory node\n");
+ return 0;
+ }
+ }
+ printf("old OF detected\r\n");
+ return 1;
+}
+
+void *of_claim(unsigned long virt, unsigned long size, unsigned long align)
+{
+ int ret;
+ unsigned int result;
+
+ if (need_map < 0)
+ need_map = check_of_version();
+ if (align || !need_map)
+ return (void *) of_call_prom("claim", 3, 1, virt, size, align);
+
+ ret = of_call_prom_ret("call-method", 5, 2, &result, "claim", memory,
+ align, size, virt);
+ if (ret != 0 || result == -1)
+ return (void *) -1;
+ ret = of_call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu,
+ align, size, virt);
+ /* 0x12 == coherent + read/write */
+ ret = of_call_prom("call-method", 6, 1, "map", chosen_mmu,
+ 0x12, size, virt, virt);
+ return (void *) virt;
+}
+
+void of_exit(void)
+{
+ of_call_prom("exit", 0, 0);
+}
Index: working-2.6/arch/powerpc/boot/Makefile
===================================================================
--- working-2.6.orig/arch/powerpc/boot/Makefile 2007-05-29 16:32:01.000000000 +1000
+++ working-2.6/arch/powerpc/boot/Makefile 2007-05-29 16:40:25.000000000 +1000
@@ -43,7 +43,7 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
- gunzip_util.c elf_util.c $(zlib) devtree.c \
+ gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c
src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c
Index: working-2.6/arch/powerpc/boot/of.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/of.c 2007-05-29 16:31:58.000000000 +1000
+++ working-2.6/arch/powerpc/boot/of.c 2007-05-29 16:40:25.000000000 +1000
@@ -15,8 +15,7 @@
#include "page.h"
#include "ops.h"
-typedef void *ihandle;
-typedef void *phandle;
+#include "of.h"
extern char _end[];
@@ -25,154 +24,10 @@ extern char _end[];
#define RAM_END (512<<20) /* Fixme: use OF */
#define ONE_MB 0x100000
-int (*prom) (void *);
static unsigned long claim_base;
-static int call_prom(const char *service, int nargs, int nret, ...)
-{
- int i;
- struct prom_args {
- const char *service;
- int nargs;
- int nret;
- unsigned int args[12];
- } args;
- va_list list;
-
- args.service = service;
- args.nargs = nargs;
- args.nret = nret;
-
- va_start(list, nret);
- for (i = 0; i < nargs; i++)
- args.args[i] = va_arg(list, unsigned int);
- va_end(list);
-
- for (i = 0; i < nret; i++)
- args.args[nargs+i] = 0;
-
- if (prom(&args) < 0)
- return -1;
-
- return (nret > 0)? args.args[nargs]: 0;
-}
-
-static int call_prom_ret(const char *service, int nargs, int nret,
- unsigned int *rets, ...)
-{
- int i;
- struct prom_args {
- const char *service;
- int nargs;
- int nret;
- unsigned int args[12];
- } args;
- va_list list;
-
- args.service = service;
- args.nargs = nargs;
- args.nret = nret;
-
- va_start(list, rets);
- for (i = 0; i < nargs; i++)
- args.args[i] = va_arg(list, unsigned int);
- va_end(list);
-
- for (i = 0; i < nret; i++)
- args.args[nargs+i] = 0;
-
- if (prom(&args) < 0)
- return -1;
-
- if (rets != (void *) 0)
- for (i = 1; i < nret; ++i)
- rets[i-1] = args.args[nargs+i];
-
- return (nret > 0)? args.args[nargs]: 0;
-}
-
-/*
- * Older OF's require that when claiming a specific range of addresses,
- * we claim the physical space in the /memory node and the virtual
- * space in the chosen mmu node, and then do a map operation to
- * map virtual to physical.
- */
-static int need_map = -1;
-static ihandle chosen_mmu;
-static phandle memory;
-
-/* returns true if s2 is a prefix of s1 */
-static int string_match(const char *s1, const char *s2)
-{
- for (; *s2; ++s2)
- if (*s1++ != *s2)
- return 0;
- return 1;
-}
-
-static int check_of_version(void)
-{
- phandle oprom, chosen;
- char version[64];
-
- oprom = finddevice("/openprom");
- if (oprom == (phandle) -1)
- return 0;
- if (getprop(oprom, "model", version, sizeof(version)) <= 0)
- return 0;
- version[sizeof(version)-1] = 0;
- printf("OF version = '%s'\r\n", version);
- if (!string_match(version, "Open Firmware, 1.")
- && !string_match(version, "FirmWorks,3."))
- return 0;
- chosen = finddevice("/chosen");
- if (chosen == (phandle) -1) {
- chosen = finddevice("/chosen@0");
- if (chosen == (phandle) -1) {
- printf("no chosen\n");
- return 0;
- }
- }
- if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) {
- printf("no mmu\n");
- return 0;
- }
- memory = (ihandle) call_prom("open", 1, 1, "/memory");
- if (memory == (ihandle) -1) {
- memory = (ihandle) call_prom("open", 1, 1, "/memory@0");
- if (memory == (ihandle) -1) {
- printf("no memory node\n");
- return 0;
- }
- }
- printf("old OF detected\r\n");
- return 1;
-}
-
-static void *claim(unsigned long virt, unsigned long size, unsigned long align)
-{
- int ret;
- unsigned int result;
-
- if (need_map < 0)
- need_map = check_of_version();
- if (align || !need_map)
- return (void *) call_prom("claim", 3, 1, virt, size, align);
-
- ret = call_prom_ret("call-method", 5, 2, &result, "claim", memory,
- align, size, virt);
- if (ret != 0 || result == -1)
- return (void *) -1;
- ret = call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu,
- align, size, virt);
- /* 0x12 == coherent + read/write */
- ret = call_prom("call-method", 6, 1, "map", chosen_mmu,
- 0x12, size, virt, virt);
- return (void *) virt;
-}
-
static void *of_try_claim(unsigned long size)
{
unsigned long addr = 0;
@@ -184,7 +39,7 @@ static void *of_try_claim(unsigned long
#ifdef DEBUG
printf(" trying: 0x%08lx\n\r", claim_base);
#endif
- addr = (unsigned long)claim(claim_base, size, 0);
+ addr = (unsigned long)of_claim(claim_base, size, 0);
if ((void *)addr != (void *)-1)
break;
}
@@ -218,52 +73,24 @@ static void *of_vmlinux_alloc(unsigned l
return p;
}
-static void of_exit(void)
-{
- call_prom("exit", 0, 0);
-}
-
/*
* OF device tree routines
*/
static void *of_finddevice(const char *name)
{
- return (phandle) call_prom("finddevice", 1, 1, name);
+ return (phandle) of_call_prom("finddevice", 1, 1, name);
}
static int of_getprop(const void *phandle, const char *name, void *buf,
const int buflen)
{
- return call_prom("getprop", 4, 1, phandle, name, buf, buflen);
+ return of_call_prom("getprop", 4, 1, phandle, name, buf, buflen);
}
static int of_setprop(const void *phandle, const char *name, const void *buf,
const int buflen)
{
- return call_prom("setprop", 4, 1, phandle, name, buf, buflen);
-}
-
-/*
- * OF console routines
- */
-static void *of_stdout_handle;
-
-static int of_console_open(void)
-{
- void *devp;
-
- if (((devp = finddevice("/chosen")) != NULL)
- && (getprop(devp, "stdout", &of_stdout_handle,
- sizeof(of_stdout_handle))
- == sizeof(of_stdout_handle)))
- return 0;
-
- return -1;
-}
-
-static void of_console_write(char *buf, int len)
-{
- call_prom("write", 3, 1, of_stdout_handle, buf, len);
+ return of_call_prom("setprop", 4, 1, phandle, name, buf, buflen);
}
void platform_init(unsigned long a1, unsigned long a2, void *promptr)
@@ -277,10 +104,9 @@ void platform_init(unsigned long a1, uns
dt_ops.getprop = of_getprop;
dt_ops.setprop = of_setprop;
- console_ops.open = of_console_open;
- console_ops.write = of_console_write;
+ of_console_init();
- prom = (int (*)(void *))promptr;
+ of_init(promptr);
loader_info.promptr = promptr;
if (a1 && a2 && a2 != 0xdeadbeef) {
loader_info.initrd_addr = a1;
Index: working-2.6/arch/powerpc/boot/ofconsole.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/ofconsole.c 2007-05-29 16:40:25.000000000 +1000
@@ -0,0 +1,45 @@
+/*
+ * OF console routines
+ *
+ * Copyright (C) Paul Mackerras 1997.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+
+#include "of.h"
+
+static void *of_stdout_handle;
+
+static int of_console_open(void)
+{
+ void *devp;
+
+ if (((devp = finddevice("/chosen")) != NULL)
+ && (getprop(devp, "stdout", &of_stdout_handle,
+ sizeof(of_stdout_handle))
+ == sizeof(of_stdout_handle)))
+ return 0;
+
+ return -1;
+}
+
+static void of_console_write(char *buf, int len)
+{
+ of_call_prom("write", 3, 1, of_stdout_handle, buf, len);
+}
+
+void of_console_init(void)
+{
+ console_ops.open = of_console_open;
+ console_ops.write = of_console_write;
+}
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 4/13] Remove the dregs of APUS support from arch/powerpc
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
2007-06-13 4:52 ` [PATCH 2/13] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-13 4:52 ` [PATCH 3/13] Abolish iopa(), mm_ptov(), io_block_mapping() " David Gibson
` (12 subsequent siblings)
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
APUS (the Amiga Power-Up System) is not supported under arch/powerpc
and it's unlikely it ever will be. Therefore, this patch removes the
fragments of APUS support code from arch/powerpc which have been
copied from arch/ppc.
A few APUS references are left in asm-powerpc in .h files which are
still used from arch/ppc.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/Kconfig | 4 -
arch/powerpc/kernel/head_32.S | 122 ---------------------------------
arch/powerpc/kernel/irq.c | 1
arch/powerpc/mm/44x_mmu.c | 1
arch/powerpc/mm/4xx_mmu.c | 1
arch/powerpc/mm/fsl_booke_mmu.c | 1
arch/powerpc/mm/init_32.c | 1
arch/powerpc/mm/init_64.c | 1
arch/powerpc/mm/mem.c | 1
arch/powerpc/mm/mmu_context_32.c | 1
arch/powerpc/mm/mmu_decl.h | 1
arch/powerpc/mm/pgtable_32.c | 1
arch/powerpc/mm/pgtable_64.c | 1
arch/powerpc/mm/ppc_mmu_32.c | 1
arch/powerpc/mm/tlb_32.c | 1
arch/powerpc/mm/tlb_64.c | 1
arch/powerpc/platforms/Kconfig | 7 -
arch/powerpc/platforms/apus/Kconfig | 130 ------------------------------------
include/asm-powerpc/pgtable-ppc32.h | 26 -------
19 files changed, 5 insertions(+), 298 deletions(-)
Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc32.h 2007-06-04 13:39:21.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc32.h 2007-06-04 13:39:22.000000000 +1000
@@ -751,32 +751,6 @@
#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
-/* CONFIG_APUS */
-/* For virtual address to physical address conversion */
-extern void cache_clear(__u32 addr, int length);
-extern void cache_push(__u32 addr, int length);
-extern int mm_end_of_chunk (unsigned long addr, int len);
-
-/* Values for nocacheflag and cmode */
-/* These are not used by the APUS kernel_map, but prevents
- compilation errors. */
-#define KERNELMAP_FULL_CACHING 0
-#define KERNELMAP_NOCACHE_SER 1
-#define KERNELMAP_NOCACHE_NONSER 2
-#define KERNELMAP_NO_COPYBACK 3
-
-/*
- * Map some physical address range into the kernel address space.
- */
-extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
- int nocacheflag, unsigned long *memavailp );
-
-/*
- * Set cache mode of (kernel space) address range.
- */
-extern void kernel_set_cachemode (unsigned long address, unsigned long size,
- unsigned int cmode);
-
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
#define kern_addr_valid(addr) (1)
Index: working-2.6/arch/powerpc/Kconfig
===================================================================
--- working-2.6.orig/arch/powerpc/Kconfig 2007-06-04 13:32:53.000000000 +1000
+++ working-2.6/arch/powerpc/Kconfig 2007-06-04 13:39:22.000000000 +1000
@@ -686,9 +686,9 @@
bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
|| PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
|| MPC7448HPC2 || PPC_PS3 || PPC_HOLLY
- default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx \
+ default y if !40x && !CPM2 && !8xx && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx
- default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
+ default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
default PCI_QSPAN if !4xx && !CPM2 && 8xx
select ARCH_SUPPORTS_MSI
help
Index: working-2.6/arch/powerpc/kernel/head_32.S
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/head_32.S 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/head_32.S 2007-06-04 13:39:22.000000000 +1000
@@ -9,7 +9,6 @@
* rewritten by Paul Mackerras.
* Copyright (C) 1996 Paul Mackerras.
* MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* This file contains the low-level support and setup for the
* PowerPC platform, including trap and interrupt dispatch.
@@ -32,10 +31,6 @@
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
-#ifdef CONFIG_APUS
-#include <asm/amigappc.h>
-#endif
-
/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
#define LOAD_BAT(n, reg, RA, RB) \
/* see the comment for clear_bats() -- Cort */ \
@@ -92,11 +87,6 @@
* r4: virtual address of boot_infos_t
* r5: 0
*
- * APUS
- * r3: 'APUS'
- * r4: physical address of memory base
- * Linux/m68k style BootInfo structure at &_end.
- *
* PREP
* This is jumped to on prep systems right after the kernel is relocated
* to its proper place in memory by the boot loader. The expected layout
@@ -150,14 +140,6 @@
*/
bl early_init
-#ifdef CONFIG_APUS
-/* On APUS the __va/__pa constants need to be set to the correct
- * values before continuing.
- */
- mr r4,r30
- bl fix_mem_constants
-#endif /* CONFIG_APUS */
-
/* Switch MMU off, clear BATs and flush TLB. At this point, r3 contains
* the physical address we are running at, returned by early_init()
*/
@@ -167,7 +149,7 @@
bl flush_tlbs
bl initial_bats
-#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
+#if defined(CONFIG_BOOTX_TEXT)
bl setup_disp_bat
#endif
@@ -183,7 +165,6 @@
#endif /* CONFIG_6xx */
-#ifndef CONFIG_APUS
/*
* We need to run with _start at physical address 0.
* On CHRP, we are loaded at 0x10000 since OF on CHRP uses
@@ -196,7 +177,6 @@
addis r4,r3,KERNELBASE@h /* current address of _start */
cmpwi 0,r4,0 /* are we already running at 0? */
bne relocate_kernel
-#endif /* CONFIG_APUS */
/*
* we now have the 1st 16M of ram mapped with the bats.
* prep needs the mmu to be turned on here, but pmac already has it on.
@@ -881,85 +861,6 @@
addi r6,r6,4
blr
-#ifdef CONFIG_APUS
-/*
- * On APUS the physical base address of the kernel is not known at compile
- * time, which means the __pa/__va constants used are incorrect. In the
- * __init section is recorded the virtual addresses of instructions using
- * these constants, so all that has to be done is fix these before
- * continuing the kernel boot.
- *
- * r4 = The physical address of the kernel base.
- */
-fix_mem_constants:
- mr r10,r4
- addis r10,r10,-KERNELBASE@h /* virt_to_phys constant */
- neg r11,r10 /* phys_to_virt constant */
-
- lis r12,__vtop_table_begin@h
- ori r12,r12,__vtop_table_begin@l
- add r12,r12,r10 /* table begin phys address */
- lis r13,__vtop_table_end@h
- ori r13,r13,__vtop_table_end@l
- add r13,r13,r10 /* table end phys address */
- subi r12,r12,4
- subi r13,r13,4
-1: lwzu r14,4(r12) /* virt address of instruction */
- add r14,r14,r10 /* phys address of instruction */
- lwz r15,0(r14) /* instruction, now insert top */
- rlwimi r15,r10,16,16,31 /* half of vp const in low half */
- stw r15,0(r14) /* of instruction and restore. */
- dcbst r0,r14 /* write it to memory */
- sync
- icbi r0,r14 /* flush the icache line */
- cmpw r12,r13
- bne 1b
- sync /* additional sync needed on g4 */
- isync
-
-/*
- * Map the memory where the exception handlers will
- * be copied to when hash constants have been patched.
- */
-#ifdef CONFIG_APUS_FAST_EXCEPT
- lis r8,0xfff0
-#else
- lis r8,0
-#endif
- ori r8,r8,0x2 /* 128KB, supervisor */
- mtspr SPRN_DBAT3U,r8
- mtspr SPRN_DBAT3L,r8
-
- lis r12,__ptov_table_begin@h
- ori r12,r12,__ptov_table_begin@l
- add r12,r12,r10 /* table begin phys address */
- lis r13,__ptov_table_end@h
- ori r13,r13,__ptov_table_end@l
- add r13,r13,r10 /* table end phys address */
- subi r12,r12,4
- subi r13,r13,4
-1: lwzu r14,4(r12) /* virt address of instruction */
- add r14,r14,r10 /* phys address of instruction */
- lwz r15,0(r14) /* instruction, now insert top */
- rlwimi r15,r11,16,16,31 /* half of pv const in low half*/
- stw r15,0(r14) /* of instruction and restore. */
- dcbst r0,r14 /* write it to memory */
- sync
- icbi r0,r14 /* flush the icache line */
- cmpw r12,r13
- bne 1b
-
- sync /* additional sync needed on g4 */
- isync /* No speculative loading until now */
- blr
-
-/***********************************************************************
- * Please note that on APUS the exception handlers are located at the
- * physical address 0xfff0000. For this reason, the exception handlers
- * cannot use relative branches to access the code below.
- ***********************************************************************/
-#endif /* CONFIG_APUS */
-
#ifdef CONFIG_SMP
#ifdef CONFIG_GEMINI
.globl __secondary_start_gemini
@@ -1135,19 +1036,6 @@
bl __save_cpu_setup
bl MMU_init
-#ifdef CONFIG_APUS
- /* Copy exception code to exception vector base on APUS. */
- lis r4,KERNELBASE@h
-#ifdef CONFIG_APUS_FAST_EXCEPT
- lis r3,0xfff0 /* Copy to 0xfff00000 */
-#else
- lis r3,0 /* Copy to 0x00000000 */
-#endif
- li r5,0x4000 /* # bytes of memory to copy */
- li r6,0
- bl copy_and_flush /* copy the first 0x4000 bytes */
-#endif /* CONFIG_APUS */
-
/*
* Go back to running unmapped so we can load up new values
* for SDR1 (hash table pointer) and the segment registers
@@ -1324,11 +1212,7 @@
#else
ori r8,r8,2 /* R/W access */
#endif /* CONFIG_SMP */
-#ifdef CONFIG_APUS
- ori r11,r11,BL_8M<<2|0x2 /* set up 8MB BAT registers for 604 */
-#else
ori r11,r11,BL_256M<<2|0x2 /* set up BAT registers for 604 */
-#endif /* CONFIG_APUS */
mtspr SPRN_DBAT0L,r8 /* N.B. 6xx (not 601) have valid */
mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */
@@ -1338,7 +1222,7 @@
blr
-#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
+#ifdef CONFIG_BOOTX_TEXT
setup_disp_bat:
/*
* setup the display bat prepared for us in prom.c
@@ -1362,7 +1246,7 @@
1: mtspr SPRN_IBAT3L,r8
mtspr SPRN_IBAT3U,r11
blr
-#endif /* !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT) */
+#endif /* CONFIG_BOOTX_TEXT */
#ifdef CONFIG_8260
/* Jump into the system reset for the rom.
Index: working-2.6/arch/powerpc/kernel/irq.c
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/irq.c 2007-06-04 13:32:53.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/irq.c 2007-06-04 13:39:22.000000000 +1000
@@ -7,7 +7,6 @@
* Copyright (C) 1996-2001 Cort Dougan
* Adapted for Power Macintosh by Paul Mackerras
* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
Index: working-2.6/arch/powerpc/mm/44x_mmu.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/44x_mmu.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/44x_mmu.c 2007-06-04 13:39:22.000000000 +1000
@@ -12,7 +12,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/4xx_mmu.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/4xx_mmu.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/4xx_mmu.c 2007-06-04 13:39:22.000000000 +1000
@@ -9,7 +9,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/fsl_booke_mmu.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/fsl_booke_mmu.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/fsl_booke_mmu.c 2007-06-04 13:39:22.000000000 +1000
@@ -14,7 +14,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/init_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/init_32.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/init_32.c 2007-06-04 13:39:22.000000000 +1000
@@ -5,7 +5,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
* PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
*
* Derived from "arch/i386/mm/init.c"
Index: working-2.6/arch/powerpc/mm/init_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/init_64.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/init_64.c 2007-06-04 13:39:22.000000000 +1000
@@ -5,7 +5,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/mem.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mem.c 2007-05-24 21:31:17.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mem.c 2007-06-04 13:39:22.000000000 +1000
@@ -5,7 +5,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
* PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
*
* Derived from "arch/i386/mm/init.c"
Index: working-2.6/arch/powerpc/mm/mmu_context_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_context_32.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mmu_context_32.c 2007-06-04 13:39:22.000000000 +1000
@@ -11,7 +11,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_decl.h 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mmu_decl.h 2007-06-04 13:39:22.000000000 +1000
@@ -8,7 +8,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/pgtable_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_64.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/pgtable_64.c 2007-06-04 13:39:22.000000000 +1000
@@ -7,7 +7,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/ppc_mmu_32.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/ppc_mmu_32.c 2007-06-04 13:39:22.000000000 +1000
@@ -11,7 +11,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/tlb_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/tlb_32.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/tlb_32.c 2007-06-04 13:39:22.000000000 +1000
@@ -11,7 +11,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/mm/tlb_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/tlb_64.c 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/tlb_64.c 2007-06-04 13:39:22.000000000 +1000
@@ -8,7 +8,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Index: working-2.6/arch/powerpc/platforms/Kconfig
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/Kconfig 2007-05-19 09:22:28.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/Kconfig 2007-06-04 13:39:22.000000000 +1000
@@ -16,13 +16,6 @@
bool "Embedded 6xx/7xx/7xxx-based board"
depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
-config APUS
- bool "Amiga-APUS"
- depends on PPC32 && BROKEN
- help
- Select APUS if configuring for a PowerUP Amiga.
- More information is available at:
- <http://linux-apus.sourceforge.net/>.
endchoice
source "arch/powerpc/platforms/pseries/Kconfig"
Index: working-2.6/arch/powerpc/platforms/apus/Kconfig
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/apus/Kconfig 2007-05-19 09:22:28.000000000 +1000
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,130 +0,0 @@
-
-config AMIGA
- bool
- depends on APUS
- default y
- help
- This option enables support for the Amiga series of computers.
-
-config ZORRO
- bool
- depends on APUS
- default y
- help
- This enables support for the Zorro bus in the Amiga. If you have
- expansion cards in your Amiga that conform to the Amiga
- AutoConfig(tm) specification, say Y, otherwise N. Note that even
- expansion cards that do not fit in the Zorro slots but fit in e.g.
- the CPU slot may fall in this category, so you have to say Y to let
- Linux use these.
-
-config ABSTRACT_CONSOLE
- bool
- depends on APUS
- default y
-
-config APUS_FAST_EXCEPT
- bool
- depends on APUS
- default y
-
-config AMIGA_PCMCIA
- bool "Amiga 1200/600 PCMCIA support"
- depends on APUS && EXPERIMENTAL
- help
- Include support in the kernel for pcmcia on Amiga 1200 and Amiga
- 600. If you intend to use pcmcia cards say Y; otherwise say N.
-
-config AMIGA_BUILTIN_SERIAL
- tristate "Amiga builtin serial support"
- depends on APUS
- help
- If you want to use your Amiga's built-in serial port in Linux,
- answer Y.
-
- To compile this driver as a module, choose M here.
-
-config GVPIOEXT
- tristate "GVP IO-Extender support"
- depends on APUS
- help
- If you want to use a GVP IO-Extender serial card in Linux, say Y.
- Otherwise, say N.
-
-config GVPIOEXT_LP
- tristate "GVP IO-Extender parallel printer support"
- depends on GVPIOEXT
- help
- Say Y to enable driving a printer from the parallel port on your
- GVP IO-Extender card, N otherwise.
-
-config GVPIOEXT_PLIP
- tristate "GVP IO-Extender PLIP support"
- depends on GVPIOEXT
- help
- Say Y to enable doing IP over the parallel port on your GVP
- IO-Extender card, N otherwise.
-
-config MULTIFACE_III_TTY
- tristate "Multiface Card III serial support"
- depends on APUS
- help
- If you want to use a Multiface III card's serial port in Linux,
- answer Y.
-
- To compile this driver as a module, choose M here.
-
-config A2232
- tristate "Commodore A2232 serial support (EXPERIMENTAL)"
- depends on EXPERIMENTAL && APUS
- ---help---
- This option supports the 2232 7-port serial card shipped with the
- Amiga 2000 and other Zorro-bus machines, dating from 1989. At
- a max of 19,200 bps, the ports are served by a 6551 ACIA UART chip
- each, plus a 8520 CIA, and a master 6502 CPU and buffer as well. The
- ports were connected with 8 pin DIN connectors on the card bracket,
- for which 8 pin to DB25 adapters were supplied. The card also had
- jumpers internally to toggle various pinning configurations.
-
- This driver can be built as a module; but then "generic_serial"
- will also be built as a module. This has to be loaded before
- "ser_a2232". If you want to do this, answer M here.
-
-config WHIPPET_SERIAL
- tristate "Hisoft Whippet PCMCIA serial support"
- depends on AMIGA_PCMCIA
- help
- HiSoft has a web page at <http://www.hisoft.co.uk/>, but there
- is no listing for the Whippet in their Amiga section.
-
-config APNE
- tristate "PCMCIA NE2000 support"
- depends on AMIGA_PCMCIA
- help
- If you have a PCMCIA NE2000 compatible adapter, say Y. Otherwise,
- say N.
-
- To compile this driver as a module, choose M here: the
- module will be called apne.
-
-config SERIAL_CONSOLE
- bool "Support for serial port console"
- depends on APUS && (AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y)
-
-config HEARTBEAT
- bool "Use power LED as a heartbeat"
- depends on APUS
- help
- Use the power-on LED on your machine as a load meter. The exact
- behavior is platform-dependent, but normally the flash frequency is
- a hyperbolic function of the 5-minute load average.
-
-config PROC_HARDWARE
- bool "/proc/hardware support"
- depends on APUS
-
-source "drivers/zorro/Kconfig"
-
-config PCI_PERMEDIA
- bool "PCI for Permedia2"
- depends on !4xx && !8xx && APUS
Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_32.c 2007-06-04 13:39:21.000000000 +1000
+++ working-2.6/arch/powerpc/mm/pgtable_32.c 2007-06-04 13:39:25.000000000 +1000
@@ -8,7 +8,6 @@
* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
* and Cort Dougan (PReP) (cort@cs.nmt.edu)
* Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
*
* Derived from "arch/i386/mm/init.c"
* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 6/13] Start factoring pgtable-ppc32.h and pgtable-ppc64.h
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (3 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 1/13] Split low-level OF-related bootloader code into separate files David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-14 14:05 ` Segher Boessenkool
2007-06-13 4:52 ` [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c David Gibson
` (9 subsequent siblings)
14 siblings, 1 reply; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
This patch factors some things defined in both pgtable-ppc32.h and
pgtable-ppc64.h into the common part of asm-powerpc/pgtable.h. These
are all things which have essentially identical definitions, and which
by their nature are very unlikely ever to need different definitions
in the two cases.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/asm-powerpc/pgtable-ppc32.h | 22 ----------------------
include/asm-powerpc/pgtable-ppc64.h | 29 -----------------------------
include/asm-powerpc/pgtable.h | 28 ++++++++++++++++++++++++++++
3 files changed, 28 insertions(+), 51 deletions(-)
Index: working-2.6/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc32.h 2007-05-30 16:47:25.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc32.h 2007-05-30 17:17:38.000000000 +1000
@@ -6,11 +6,7 @@
#ifndef __ASSEMBLY__
#include <linux/sched.h>
#include <linux/threads.h>
-#include <asm/processor.h> /* For TASK_SIZE */
-#include <asm/mmu.h>
-#include <asm/page.h>
#include <asm/io.h> /* For sub-arch specific PPC_PIN_SIZE */
-struct mm_struct;
extern unsigned long va_to_phys(unsigned long address);
extern pte_t *va_to_pte(unsigned long address);
@@ -488,14 +484,6 @@ extern unsigned long bad_call_to_PMD_PAG
#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\
pgprot_val(prot))
#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[1024];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-
#endif /* __ASSEMBLY__ */
#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
@@ -730,10 +718,6 @@ extern pgprot_t phys_mem_access_prot(str
#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
-extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
-
-extern void paging_init(void);
-
/*
* Encode and decode a swap entry.
* Note that the bits we use in a PTE for representing a swap entry
@@ -751,12 +735,6 @@ extern void paging_init(void);
#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-#define kern_addr_valid(addr) (1)
-
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
/*
* No page table caches to initialise
*/
Index: working-2.6/include/asm-powerpc/pgtable-ppc64.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable-ppc64.h 2007-05-30 16:47:25.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable-ppc64.h 2007-05-30 16:52:16.000000000 +1000
@@ -7,11 +7,7 @@
#ifndef __ASSEMBLY__
#include <linux/stddef.h>
-#include <asm/processor.h> /* For TASK_SIZE */
-#include <asm/mmu.h>
-#include <asm/page.h>
#include <asm/tlbflush.h>
-struct mm_struct;
#endif /* __ASSEMBLY__ */
#ifdef CONFIG_PPC_64K_PAGES
@@ -134,16 +130,6 @@ struct mm_struct;
#define __S110 PAGE_SHARED_X
#define __S111 PAGE_SHARED_X
-#ifndef __ASSEMBLY__
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-#endif /* __ASSEMBLY__ */
-
#ifdef CONFIG_HUGETLB_PAGE
#define HAVE_ARCH_UNMAPPED_AREA
@@ -438,10 +424,6 @@ extern pgprot_t phys_mem_access_prot(str
#define pgd_ERROR(e) \
printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-extern pgd_t swapper_pg_dir[];
-
-extern void paging_init(void);
-
/* Encode and de-code a swap entry */
#define __swp_type(entry) (((entry).val >> 1) & 0x3f)
#define __swp_offset(entry) ((entry).val >> 8)
@@ -452,17 +434,6 @@ extern void paging_init(void);
#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
-/*
- * kern_addr_valid is intended to indicate whether an address is a valid
- * kernel address. Most 32-bit archs define it as always true (like this)
- * but most 64-bit archs actually perform a test. What should we do here?
- * The only use is in fs/ncpfs/dir.c
- */
-#define kern_addr_valid(addr) (1)
-
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-
void pgtable_cache_init(void);
/*
Index: working-2.6/include/asm-powerpc/pgtable.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/pgtable.h 2007-05-30 16:47:25.000000000 +1000
+++ working-2.6/include/asm-powerpc/pgtable.h 2007-05-30 16:52:11.000000000 +1000
@@ -2,6 +2,13 @@
#define _ASM_POWERPC_PGTABLE_H
#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+#include <asm/processor.h> /* For TASK_SIZE */
+#include <asm/mmu.h>
+#include <asm/page.h>
+struct mm_struct;
+#endif /* !__ASSEMBLY__ */
+
#if defined(CONFIG_PPC64)
# include <asm/pgtable-ppc64.h>
#else
@@ -9,6 +16,27 @@
#endif
#ifndef __ASSEMBLY__
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+extern unsigned long empty_zero_page[];
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+
+extern pgd_t swapper_pg_dir[];
+
+extern void paging_init(void);
+
+/*
+ * kern_addr_valid is intended to indicate whether an address is a valid
+ * kernel address. Most 32-bit archs define it as always true (like this)
+ * but most 64-bit archs actually perform a test. What should we do here?
+ */
+#define kern_addr_valid(addr) (1)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
+ remap_pfn_range(vma, vaddr, pfn, size, prot)
+
#include <asm-generic/pgtable.h>
#endif /* __ASSEMBLY__ */
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (4 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 6/13] Start factoring pgtable-ppc32.h and pgtable-ppc64.h David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-14 21:04 ` Kumar Gala
2007-06-13 4:52 ` [PATCH 7/13] Kill typedef-ed structs for hash PTEs and BATs David Gibson
` (8 subsequent siblings)
14 siblings, 1 reply; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In arch/powerpc/mm/pgtable_32.c, the varialbe io_bat_index and the
macro is_power_of_4() no longer have any users. This patch removes
them.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/mm/pgtable_32.c | 4 ----
1 file changed, 4 deletions(-)
Index: working-2.6/arch/powerpc/mm/pgtable_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/pgtable_32.c 2007-05-10 14:13:36.000000000 +1000
+++ working-2.6/arch/powerpc/mm/pgtable_32.c 2007-05-10 14:13:44.000000000 +1000
@@ -36,7 +36,6 @@
unsigned long ioremap_base;
unsigned long ioremap_bot;
EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
-int io_bat_index;
#if defined(CONFIG_6xx) || defined(CONFIG_POWER3)
#define HAVE_BATS 1
@@ -299,9 +298,6 @@ void __init mapin_ram(void)
}
}
-/* is x a power of 4? */
-#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
-
/* Scan the real Linux page tables and return a PTE pointer for
* a virtual address in a context.
* Returns true (1) if PTE was found, zero otherwise. The pointer to
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 7/13] Kill typedef-ed structs for hash PTEs and BATs
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (5 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-13 4:52 ` [PATCH 8/13] Merge CPU features pertaining to icache coherency David Gibson
` (7 subsequent siblings)
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Using typedefs to rename structure types if frowned on by CodingStyle.
However, we do so for the hash PTE structure on both ppc32 (where it's
called "PTE") and ppc64 (where it's called "hpte_t"). On ppc32 we
also have such a typedef for the BATs ("BAT").
This patch removes this unhelpful use of typedefs, in the process
bringing ppc32 and ppc64 closer together, by using the name "struct
hash_pte" in both cases.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/mm/hash_native_64.c | 22 +++++++++++-----------
arch/powerpc/mm/hash_utils_64.c | 2 +-
arch/powerpc/mm/mmu_decl.h | 4 ++--
arch/powerpc/mm/ppc_mmu_32.c | 6 +++---
arch/powerpc/platforms/iseries/call_hpt.h | 9 +++++----
arch/powerpc/platforms/iseries/htab.c | 8 ++++----
arch/powerpc/platforms/ps3/htab.c | 14 +++++++-------
include/asm-powerpc/mmu-hash32.h | 8 ++++----
include/asm-powerpc/mmu-hash64.h | 6 +++---
9 files changed, 40 insertions(+), 39 deletions(-)
Index: working-2.6/include/asm-powerpc/mmu-hash32.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-hash32.h 2007-05-11 09:25:10.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-hash32.h 2007-05-11 09:25:10.000000000 +1000
@@ -28,7 +28,7 @@
#define BPP_RW 0x02 /* Read/write */
#ifndef __ASSEMBLY__
-typedef struct _BAT {
+struct ppc_bat {
struct {
unsigned long bepi:15; /* Effective page index (virtual address) */
unsigned long :4; /* Unused */
@@ -46,7 +46,7 @@ typedef struct _BAT {
unsigned long :1; /* Unused */
unsigned long pp:2; /* Page access protections */
} batl; /* Lower register */
-} BAT;
+};
#endif /* !__ASSEMBLY__ */
/*
@@ -62,7 +62,7 @@ typedef struct _BAT {
#ifndef __ASSEMBLY__
/* Hardware Page Table Entry */
-typedef struct _PTE {
+struct hash_pte {
unsigned long v:1; /* Entry is valid */
unsigned long vsid:24; /* Virtual segment identifier */
unsigned long h:1; /* Hash algorithm indicator */
@@ -77,7 +77,7 @@ typedef struct _PTE {
unsigned long g:1; /* Guarded */
unsigned long :1; /* Unused */
unsigned long pp:2; /* Page protection */
-} PTE;
+};
typedef struct {
unsigned long id;
Index: working-2.6/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/ppc_mmu_32.c 2007-05-11 09:25:10.000000000 +1000
+++ working-2.6/arch/powerpc/mm/ppc_mmu_32.c 2007-05-11 09:25:10.000000000 +1000
@@ -34,12 +34,12 @@
#include "mmu_decl.h"
-PTE *Hash, *Hash_end;
+struct hash_pte *Hash, *Hash_end;
unsigned long Hash_size, Hash_mask;
unsigned long _SDR1;
union ubat { /* BAT register values to be loaded */
- BAT bat;
+ struct ppc_bat bat;
u32 word[2];
} BATS[8][2]; /* 8 pairs of IBAT, DBAT */
@@ -244,7 +244,7 @@ void __init MMU_init_hw(void)
cacheable_memzero(Hash, Hash_size);
_SDR1 = __pa(Hash) | SDR1_LOW_BITS;
- Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
+ Hash_end = (struct hash_pte *) ((unsigned long)Hash + Hash_size);
printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n",
total_memory >> 20, Hash_size >> 10, Hash);
Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_decl.h 2007-05-11 09:25:10.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mmu_decl.h 2007-05-11 09:25:10.000000000 +1000
@@ -39,8 +39,8 @@ extern int __map_without_bats;
extern unsigned long ioremap_base;
extern unsigned int rtas_data, rtas_size;
-struct _PTE;
-extern struct _PTE *Hash, *Hash_end;
+struct hash_pte;
+extern struct hash_pte *Hash, *Hash_end;
extern unsigned long Hash_size, Hash_mask;
extern unsigned int num_tlbcam_entries;
Index: working-2.6/include/asm-powerpc/mmu-hash64.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-hash64.h 2007-05-11 09:24:29.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-hash64.h 2007-05-11 09:25:10.000000000 +1000
@@ -103,12 +103,12 @@ extern char initial_stab[];
#ifndef __ASSEMBLY__
-typedef struct {
+struct hash_pte {
unsigned long v;
unsigned long r;
-} hpte_t;
+};
-extern hpte_t *htab_address;
+extern struct hash_pte *htab_address;
extern unsigned long htab_size_bytes;
extern unsigned long htab_hash_mask;
Index: working-2.6/arch/powerpc/mm/hash_native_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/hash_native_64.c 2007-05-11 09:24:28.000000000 +1000
+++ working-2.6/arch/powerpc/mm/hash_native_64.c 2007-05-11 09:25:10.000000000 +1000
@@ -104,7 +104,7 @@ static inline void tlbie(unsigned long v
spin_unlock(&native_tlbie_lock);
}
-static inline void native_lock_hpte(hpte_t *hptep)
+static inline void native_lock_hpte(struct hash_pte *hptep)
{
unsigned long *word = &hptep->v;
@@ -116,7 +116,7 @@ static inline void native_lock_hpte(hpte
}
}
-static inline void native_unlock_hpte(hpte_t *hptep)
+static inline void native_unlock_hpte(struct hash_pte *hptep)
{
unsigned long *word = &hptep->v;
@@ -128,7 +128,7 @@ static long native_hpte_insert(unsigned
unsigned long pa, unsigned long rflags,
unsigned long vflags, int psize)
{
- hpte_t *hptep = htab_address + hpte_group;
+ struct hash_pte *hptep = htab_address + hpte_group;
unsigned long hpte_v, hpte_r;
int i;
@@ -177,7 +177,7 @@ static long native_hpte_insert(unsigned
static long native_hpte_remove(unsigned long hpte_group)
{
- hpte_t *hptep;
+ struct hash_pte *hptep;
int i;
int slot_offset;
unsigned long hpte_v;
@@ -217,7 +217,7 @@ static long native_hpte_remove(unsigned
static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
unsigned long va, int psize, int local)
{
- hpte_t *hptep = htab_address + slot;
+ struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v, want_v;
int ret = 0;
@@ -251,7 +251,7 @@ static long native_hpte_updatepp(unsigne
static long native_hpte_find(unsigned long va, int psize)
{
- hpte_t *hptep;
+ struct hash_pte *hptep;
unsigned long hash;
unsigned long i, j;
long slot;
@@ -294,7 +294,7 @@ static void native_hpte_updateboltedpp(u
{
unsigned long vsid, va;
long slot;
- hpte_t *hptep;
+ struct hash_pte *hptep;
vsid = get_kernel_vsid(ea);
va = (vsid << 28) | (ea & 0x0fffffff);
@@ -315,7 +315,7 @@ static void native_hpte_updateboltedpp(u
static void native_hpte_invalidate(unsigned long slot, unsigned long va,
int psize, int local)
{
- hpte_t *hptep = htab_address + slot;
+ struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v;
unsigned long want_v;
unsigned long flags;
@@ -345,7 +345,7 @@ static void native_hpte_invalidate(unsig
#define LP_BITS 8
#define LP_MASK(i) ((0xFF >> (i)) << LP_SHIFT)
-static void hpte_decode(hpte_t *hpte, unsigned long slot,
+static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
int *psize, unsigned long *va)
{
unsigned long hpte_r = hpte->r;
@@ -415,7 +415,7 @@ static void hpte_decode(hpte_t *hpte, un
static void native_hpte_clear(void)
{
unsigned long slot, slots, flags;
- hpte_t *hptep = htab_address;
+ struct hash_pte *hptep = htab_address;
unsigned long hpte_v, va;
unsigned long pteg_count;
int psize;
@@ -462,7 +462,7 @@ static void native_hpte_clear(void)
static void native_flush_hash_range(unsigned long number, int local)
{
unsigned long va, hash, index, hidx, shift, slot;
- hpte_t *hptep;
+ struct hash_pte *hptep;
unsigned long hpte_v;
unsigned long want_v;
unsigned long flags;
Index: working-2.6/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/hash_utils_64.c 2007-05-10 10:42:00.000000000 +1000
+++ working-2.6/arch/powerpc/mm/hash_utils_64.c 2007-05-11 09:25:10.000000000 +1000
@@ -87,7 +87,7 @@ extern unsigned long dart_tablebase;
static unsigned long _SDR1;
struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
-hpte_t *htab_address;
+struct hash_pte *htab_address;
unsigned long htab_size_bytes;
unsigned long htab_hash_mask;
int mmu_linear_psize = MMU_PAGE_4K;
Index: working-2.6/arch/powerpc/platforms/ps3/htab.c
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/ps3/htab.c 2007-05-07 12:57:07.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/ps3/htab.c 2007-05-11 09:25:10.000000000 +1000
@@ -34,7 +34,7 @@
#define DBG(fmt...) do{if(0)printk(fmt);}while(0)
#endif
-static hpte_t *htab;
+static struct hash_pte *htab;
static unsigned long htab_addr;
static unsigned char *bolttab;
static unsigned char *inusetab;
@@ -44,8 +44,8 @@ static DEFINE_SPINLOCK(ps3_bolttab_lock)
#define debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g) \
_debug_dump_hpte(_a, _b, _c, _d, _e, _f, _g, __func__, __LINE__)
static void _debug_dump_hpte(unsigned long pa, unsigned long va,
- unsigned long group, unsigned long bitmap, hpte_t lhpte, int psize,
- unsigned long slot, const char* func, int line)
+ unsigned long group, unsigned long bitmap, struct hash_pte lhpte,
+ int psize, unsigned long slot, const char* func, int line)
{
DBG("%s:%d: pa = %lxh\n", func, line, pa);
DBG("%s:%d: lpar = %lxh\n", func, line,
@@ -63,7 +63,7 @@ static long ps3_hpte_insert(unsigned lon
unsigned long pa, unsigned long rflags, unsigned long vflags, int psize)
{
unsigned long slot;
- hpte_t lhpte;
+ struct hash_pte lhpte;
int secondary = 0;
unsigned long result;
unsigned long bitmap;
@@ -255,7 +255,7 @@ void __init ps3_hpte_init(unsigned long
ppc64_pft_size = __ilog2(htab_size);
- bitmap_size = htab_size / sizeof(hpte_t) / 8;
+ bitmap_size = htab_size / sizeof(struct hash_pte) / 8;
bolttab = __va(lmb_alloc(bitmap_size, 1));
inusetab = __va(lmb_alloc(bitmap_size, 1));
@@ -273,8 +273,8 @@ void __init ps3_map_htab(void)
result = lv1_map_htab(0, &htab_addr);
- htab = (hpte_t *)__ioremap(htab_addr, htab_size,
- pgprot_val(PAGE_READONLY_X));
+ htab = (struct hash_pte *)__ioremap(htab_addr, htab_size,
+ pgprot_val(PAGE_READONLY_X));
DBG("%s:%d: lpar %016lxh, virt %016lxh\n", __func__, __LINE__,
htab_addr, (unsigned long)htab);
Index: working-2.6/arch/powerpc/platforms/iseries/call_hpt.h
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/iseries/call_hpt.h 2007-05-11 09:28:00.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/iseries/call_hpt.h 2007-05-11 09:31:40.000000000 +1000
@@ -76,24 +76,25 @@ static inline u64 HvCallHpt_invalidateSe
return compressedStatus;
}
-static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn)
+static inline u64 HvCallHpt_findValid(struct hash_pte *hpte, u64 vpn)
{
return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
}
-static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex,
+static inline u64 HvCallHpt_findNextValid(struct hash_pte *hpte, u32 hpteIndex,
u8 bitson, u8 bitsoff)
{
return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
bitson, bitsoff);
}
-static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex)
+static inline void HvCallHpt_get(struct hash_pte *hpte, u32 hpteIndex)
{
HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
}
-static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte)
+static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit,
+ struct hash_pte *hpte)
{
HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r);
}
Index: working-2.6/arch/powerpc/platforms/iseries/htab.c
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/iseries/htab.c 2007-05-11 09:27:12.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/iseries/htab.c 2007-05-11 09:27:46.000000000 +1000
@@ -44,7 +44,7 @@ long iSeries_hpte_insert(unsigned long h
unsigned long vflags, int psize)
{
long slot;
- hpte_t lhpte;
+ struct hash_pte lhpte;
int secondary = 0;
BUG_ON(psize != MMU_PAGE_4K);
@@ -99,7 +99,7 @@ long iSeries_hpte_insert(unsigned long h
static unsigned long iSeries_hpte_getword0(unsigned long slot)
{
- hpte_t hpte;
+ struct hash_pte hpte;
HvCallHpt_get(&hpte, slot);
return hpte.v;
@@ -144,7 +144,7 @@ static long iSeries_hpte_remove(unsigned
static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
unsigned long va, int psize, int local)
{
- hpte_t hpte;
+ struct hash_pte hpte;
unsigned long want_v;
iSeries_hlock(slot);
@@ -176,7 +176,7 @@ static long iSeries_hpte_updatepp(unsign
*/
static long iSeries_hpte_find(unsigned long vpn)
{
- hpte_t hpte;
+ struct hash_pte hpte;
long slot;
/*
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 8/13] Merge CPU features pertaining to icache coherency
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (6 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 7/13] Kill typedef-ed structs for hash PTEs and BATs David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-13 4:52 ` [PATCH 9/13] Factor zImage's 44x reset code out of ebony.c David Gibson
` (6 subsequent siblings)
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Currently the powerpc kernel has a 64-bit only feature,
COHERENT_ICACHE used for those CPUS which maintain icache/dcache
coherency in hardware (POWER5, essentially). It also has a feature,
SPLIT_ID_CACHE, which is used on CPUs which have separate i and
d-caches, which is to say everything except 601 and Freescale E200.
In nearly all the places we check the SPLIT_ID_CACHE, what we actually
care about is whether the i and d-caches are coherent (which they will
be, trivially, if they're the same cache).
This patch tries to clarify the situation a little. The
COHERENT_ICACHE feature becomes availble on 32-bit and is set for all
CPUs where i and d-cache are effectively coherent, whether this is due
to special logic (POWER5) or because they're unified. We check this,
instead of SPLIT_ID_CACHE nearly everywhere.
The SPLIT_ID_CACHE feature itself is replaced by a UNIFIED_ID_CACHE
feature with reversed sense, set only on 601 and Freescale E200. In
the two places (one Freescale BookE specific) where we really care
whether it's a unified cache, not whether they're coherent, we check
this feature. The CPUs with unified cache are so few, we could
consider replacing this feature bit with explicit checks against the
PVR.
This patch will make unifying the 32-bit and 64-bit cache flush code a
little more straightforward.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/kernel/misc_32.S | 10 ++--
arch/powerpc/kernel/setup_32.c | 12 ++---
arch/ppc/kernel/misc.S | 8 +--
arch/ppc/kernel/setup.c | 2
include/asm-powerpc/cputable.h | 95 ++++++++++++++++++++---------------------
5 files changed, 62 insertions(+), 65 deletions(-)
Index: working-2.6/include/asm-powerpc/cputable.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/cputable.h 2007-05-21 12:47:17.000000000 +1000
+++ working-2.6/include/asm-powerpc/cputable.h 2007-05-30 16:35:31.000000000 +1000
@@ -111,7 +111,7 @@ extern void do_feature_fixups(unsigned l
/* CPU kernel features */
/* Retain the 32b definitions all use bottom half of word */
-#define CPU_FTR_SPLIT_ID_CACHE ASM_CONST(0x0000000000000001)
+#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000000000000001)
#define CPU_FTR_L2CR ASM_CONST(0x0000000000000002)
#define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004)
#define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008)
@@ -135,6 +135,7 @@ extern void do_feature_fixups(unsigned l
#define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000)
#define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000)
#define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x0000000000800000)
+#define CPU_FTR_UNIFIED_ID_CACHE ASM_CONST(0x0000000001000000)
/*
* Add the 64-bit processor unique features in the top half of the word;
@@ -154,7 +155,6 @@ extern void do_feature_fixups(unsigned l
#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000)
#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000)
#define CPU_FTR_SMT LONG_ASM_CONST(0x0000010000000000)
-#define CPU_FTR_COHERENT_ICACHE LONG_ASM_CONST(0x0000020000000000)
#define CPU_FTR_LOCKLESS_TLBIE LONG_ASM_CONST(0x0000040000000000)
#define CPU_FTR_CI_LARGE_PAGE LONG_ASM_CONST(0x0000100000000000)
#define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000)
@@ -206,164 +206,163 @@ extern void do_feature_fixups(unsigned l
!defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
!defined(CONFIG_BOOKE))
-#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE)
-#define CPU_FTRS_603 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE | \
+ CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE)
+#define CPU_FTRS_603 (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
-#define CPU_FTRS_604 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_604 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE | \
CPU_FTR_PPC_LE)
-#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
-#define CPU_FTRS_740 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_740 (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
CPU_FTR_PPC_LE)
-#define CPU_FTRS_750 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_750 (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
CPU_FTR_PPC_LE)
-#define CPU_FTRS_750CL (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_750CL (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
-#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM | CPU_FTR_PPC_LE)
-#define CPU_FTRS_750FX2 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_750FX2 (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
CPU_FTR_NO_DPM | CPU_FTR_PPC_LE)
-#define CPU_FTRS_750FX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_750FX (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
-#define CPU_FTRS_750GX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_750GX (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7400 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7400 (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7450_21 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7450_21 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \
CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7450_23 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7450_23 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7455_1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7455_1 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | \
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7455_20 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7455_20 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \
CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7455 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7455 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7447_10 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7447_10 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7447 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7447 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7447A (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7447A (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
-#define CPU_FTRS_7448 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_7448 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_PPC_LE)
-#define CPU_FTRS_82XX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_82XX (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB)
-#define CPU_FTRS_G2_LE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \
+#define CPU_FTRS_G2_LE (CPU_FTR_MAYBE_CAN_DOZE | \
CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS)
-#define CPU_FTRS_E300 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \
+#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \
CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_COMMON)
-#define CPU_FTRS_E300C2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \
+#define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \
CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \
CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE)
-#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
+#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | \
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE)
-#define CPU_FTRS_8XX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB)
-#define CPU_FTRS_40X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
- CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_44X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
- CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_E500 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
- CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_E500_2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_8XX (CPU_FTR_USE_TB)
+#define CPU_FTRS_40X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_44X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
+ CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE)
+#define CPU_FTRS_E500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | \
CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN)
#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
/* 64-bit CPUs */
-#define CPU_FTRS_POWER3 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE)
-#define CPU_FTRS_RS64 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \
CPU_FTR_MMCRA | CPU_FTR_CTRL)
-#define CPU_FTRS_POWER4 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA)
-#define CPU_FTRS_PPC970 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA)
-#define CPU_FTRS_POWER5 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR)
-#define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
CPU_FTR_DSCR)
-#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_CELL (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG)
-#define CPU_FTRS_PA6T (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
CPU_FTR_PURR | CPU_FTR_REAL_LE)
-#define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
#ifdef __powerpc64__
Index: working-2.6/arch/powerpc/kernel/misc_32.S
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/misc_32.S 2007-04-19 10:59:55.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/misc_32.S 2007-05-30 16:35:31.000000000 +1000
@@ -392,7 +392,7 @@ BEGIN_FTR_SECTION
mtspr SPRN_L1CSR0,r3
isync
blr
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
mfspr r3,SPRN_L1CSR1
ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
mtspr SPRN_L1CSR1,r3
@@ -419,7 +419,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_C
_GLOBAL(__flush_icache_range)
BEGIN_FTR_SECTION
blr /* for 601, do nothing */
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
li r5,L1_CACHE_BYTES-1
andc r3,r3,r5
subf r4,r3,r4
@@ -514,8 +514,8 @@ _GLOBAL(invalidate_dcache_range)
*/
_GLOBAL(__flush_dcache_icache)
BEGIN_FTR_SECTION
- blr /* for 601, do nothing */
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+ blr
+END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
rlwinm r3,r3,0,0,19 /* Get page base address */
li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
mtctr r4
@@ -543,7 +543,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_C
_GLOBAL(__flush_dcache_icache_phys)
BEGIN_FTR_SECTION
blr /* for 601, do nothing */
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
mfmsr r10
rlwinm r0,r10,0,28,26 /* clear DR */
mtmsr r0
Index: working-2.6/arch/powerpc/kernel/setup_32.c
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/setup_32.c 2007-04-26 13:57:24.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/setup_32.c 2007-05-30 16:35:31.000000000 +1000
@@ -262,13 +262,11 @@ void __init setup_arch(char **cmdline_p)
* Systems with OF can look in the properties on the cpu node(s)
* for a possibly more accurate value.
*/
- if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
- dcache_bsize = cur_cpu_spec->dcache_bsize;
- icache_bsize = cur_cpu_spec->icache_bsize;
- ucache_bsize = 0;
- } else
- ucache_bsize = dcache_bsize = icache_bsize
- = cur_cpu_spec->dcache_bsize;
+ dcache_bsize = cur_cpu_spec->dcache_bsize;
+ icache_bsize = cur_cpu_spec->icache_bsize;
+ ucache_bsize = 0;
+ if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
+ ucache_bsize = icache_bsize = dcache_bsize;
/* reboot on panic */
panic_timeout = 180;
Index: working-2.6/arch/ppc/kernel/misc.S
===================================================================
--- working-2.6.orig/arch/ppc/kernel/misc.S 2007-01-24 12:01:17.000000000 +1100
+++ working-2.6/arch/ppc/kernel/misc.S 2007-05-30 16:35:31.000000000 +1000
@@ -328,7 +328,7 @@ BEGIN_FTR_SECTION
mtspr SPRN_L1CSR0,r3
isync
blr
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
mfspr r3,SPRN_L1CSR1
ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
mtspr SPRN_L1CSR1,r3
@@ -355,7 +355,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_C
_GLOBAL(__flush_icache_range)
BEGIN_FTR_SECTION
blr /* for 601, do nothing */
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
li r5,L1_CACHE_BYTES-1
andc r3,r3,r5
subf r4,r3,r4
@@ -472,7 +472,7 @@ _GLOBAL(flush_dcache_all)
_GLOBAL(__flush_dcache_icache)
BEGIN_FTR_SECTION
blr /* for 601, do nothing */
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
rlwinm r3,r3,0,0,19 /* Get page base address */
li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
mtctr r4
@@ -500,7 +500,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_C
_GLOBAL(__flush_dcache_icache_phys)
BEGIN_FTR_SECTION
blr /* for 601, do nothing */
-END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
mfmsr r10
rlwinm r0,r10,0,28,26 /* clear DR */
mtmsr r0
Index: working-2.6/arch/ppc/kernel/setup.c
===================================================================
--- working-2.6.orig/arch/ppc/kernel/setup.c 2007-02-14 10:58:22.000000000 +1100
+++ working-2.6/arch/ppc/kernel/setup.c 2007-05-30 16:35:31.000000000 +1000
@@ -526,7 +526,7 @@ void __init setup_arch(char **cmdline_p)
* Systems with OF can look in the properties on the cpu node(s)
* for a possibly more accurate value.
*/
- if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
+ if (! cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) {
dcache_bsize = cur_cpu_spec->dcache_bsize;
icache_bsize = cur_cpu_spec->icache_bsize;
ucache_bsize = 0;
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 9/13] Factor zImage's 44x reset code out of ebony.c
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (7 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 8/13] Merge CPU features pertaining to icache coherency David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-13 4:52 ` [PATCH 10/13] Derive ebc ranges property from EBC registers David Gibson
` (5 subsequent siblings)
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
The ebony_exit() function which resets the Ebony board should in fact
be common to most if not all 44x boards. This patch moves the
function out into 44x.c, renaming it, so it can be used by other 44x
platforms.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/boot/44x.c | 16 ++++++++++++++++
arch/powerpc/boot/44x.h | 2 ++
arch/powerpc/boot/ebony.c | 18 +-----------------
3 files changed, 19 insertions(+), 17 deletions(-)
Index: working-2.6/arch/powerpc/boot/44x.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/44x.c 2007-05-08 15:07:45.000000000 +1000
+++ working-2.6/arch/powerpc/boot/44x.c 2007-05-16 16:45:01.000000000 +1000
@@ -38,3 +38,19 @@ void ibm44x_fixup_memsize(void)
dt_fixup_memory(0, memsize);
}
+
+#define SPRN_DBCR0 0x134
+#define DBCR0_RST_SYSTEM 0x30000000
+
+void ibm44x_dbcr_reset(void)
+{
+ unsigned long tmp;
+
+ asm volatile (
+ "mfspr %0,%1\n"
+ "oris %0,%0,%2@h\n"
+ "mtspr %1,%0"
+ : "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
+ );
+
+}
Index: working-2.6/arch/powerpc/boot/44x.h
===================================================================
--- working-2.6.orig/arch/powerpc/boot/44x.h 2007-05-08 15:07:45.000000000 +1000
+++ working-2.6/arch/powerpc/boot/44x.h 2007-05-16 16:45:01.000000000 +1000
@@ -11,6 +11,8 @@
#define _PPC_BOOT_44X_H_
void ibm44x_fixup_memsize(void);
+
+void ibm44x_dbcr_reset(void);
void ebony_init(void *mac0, void *mac1);
#endif /* _PPC_BOOT_44X_H_ */
Index: working-2.6/arch/powerpc/boot/ebony.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/ebony.c 2007-05-08 15:07:45.000000000 +1000
+++ working-2.6/arch/powerpc/boot/ebony.c 2007-05-16 16:45:00.000000000 +1000
@@ -102,26 +102,10 @@ static void ebony_fixups(void)
dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
}
-#define SPRN_DBCR0 0x134
-#define DBCR0_RST_SYSTEM 0x30000000
-
-static void ebony_exit(void)
-{
- unsigned long tmp;
-
- asm volatile (
- "mfspr %0,%1\n"
- "oris %0,%0,%2@h\n"
- "mtspr %1,%0"
- : "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
- );
-
-}
-
void ebony_init(void *mac0, void *mac1)
{
platform_ops.fixups = ebony_fixups;
- platform_ops.exit = ebony_exit;
+ platform_ops.exit = ibm44x_dbcr_reset;
ebony_mac0 = mac0;
ebony_mac1 = mac1;
ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 10/13] Derive ebc ranges property from EBC registers
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (8 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 9/13] Factor zImage's 44x reset code out of ebony.c David Gibson
@ 2007-06-13 4:52 ` David Gibson
2007-06-14 14:12 ` Segher Boessenkool
2007-06-14 14:14 ` Segher Boessenkool
2007-06-13 4:53 ` [PATCH 13/13] Fix problems with device tree representation of TSI-1xx bridges David Gibson
` (4 subsequent siblings)
14 siblings, 2 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In the device tree for Ebony, the 'ranges' property in the node for
the EBC bridge shows the mappings from the chip select / address lines
actually used for the EBC peripherals into the address space of the
OPB. At present, these mappings are hardcoded in ebony.dts for the
mappings set up by the OpenBIOS firmware when it configures the EBC
bridge.
This patch replaces the hardcoded mappings with code in the zImage to
read the EBC configuration registers and create an appropriate ranges
property based on them. This should make the zImage and kernel more
robust to changes in firmware configuration. In particular, some of
the Ebony's DIP switches can change the effective address of the Flash
and other peripherals in OPB space. With this patch, the kernel will
be able to cope with at least some of the possible variations.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/boot/44x.c | 29 +++++++++++++++++++++++++++++
arch/powerpc/boot/44x.h | 1 +
arch/powerpc/boot/dcr.h | 37 +++++++++++++++++++++++++++++++++++++
arch/powerpc/boot/dts/ebony.dts | 8 +++-----
arch/powerpc/boot/ebony.c | 1 +
5 files changed, 71 insertions(+), 5 deletions(-)
Index: working-2.6/arch/powerpc/boot/dcr.h
===================================================================
--- working-2.6.orig/arch/powerpc/boot/dcr.h 2007-05-08 15:07:45.000000000 +1000
+++ working-2.6/arch/powerpc/boot/dcr.h 2007-05-28 15:42:37.000000000 +1000
@@ -26,6 +26,43 @@ static const unsigned long sdram_bxcr[]
#define SDRAM_CONFIG_BANK_SIZE(reg) \
(0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17))
+/* 440GP External Bus Controller (EBC) */
+#define DCRN_EBC0_CFGADDR 0x012
+#define DCRN_EBC0_CFGDATA 0x013
+#define EBC_NUM_BANKS 8
+#define EBC_B0CR 0x00
+#define EBC_B1CR 0x01
+#define EBC_B2CR 0x02
+#define EBC_B3CR 0x03
+#define EBC_B4CR 0x04
+#define EBC_B5CR 0x05
+#define EBC_B6CR 0x06
+#define EBC_B7CR 0x07
+#define EBC_BXCR(n) (n)
+#define EBC_BXCR_BAS 0xfff00000
+#define EBC_BXCR_BS 0x000e0000
+#define EBC_BXCR_BANK_SIZE(reg) \
+ (0x100000 << (((reg) & EBC_BXCR_BS) >> 17))
+#define EBC_BXCR_BU 0x00018000
+#define EBC_BXCR_BU_OFF 0x00000000
+#define EBC_BXCR_BU_RO 0x00008000
+#define EBC_BXCR_BU_WO 0x00010000
+#define EBC_BXCR_BU_RW 0x00018000
+#define EBC_BXCR_BW 0x00006000
+#define EBC_B0AP 0x10
+#define EBC_B1AP 0x11
+#define EBC_B2AP 0x12
+#define EBC_B3AP 0x13
+#define EBC_B4AP 0x14
+#define EBC_B5AP 0x15
+#define EBC_B6AP 0x16
+#define EBC_B7AP 0x17
+#define EBC_BXAP(n) (0x10+(n))
+#define EBC_BEAR 0x20
+#define EBC_BESR 0x21
+#define EBC_CFG 0x23
+#define EBC_CID 0x24
+
/* 440GP Clock, PM, chip control */
#define DCRN_CPC0_SR 0x0b0
#define DCRN_CPC0_ER 0x0b1
Index: working-2.6/arch/powerpc/boot/ebony.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/ebony.c 2007-05-28 15:42:37.000000000 +1000
+++ working-2.6/arch/powerpc/boot/ebony.c 2007-05-28 15:54:59.000000000 +1000
@@ -100,6 +100,7 @@ static void ebony_fixups(void)
ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
ibm44x_fixup_memsize();
dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
+ ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
}
void ebony_init(void *mac0, void *mac1)
Index: working-2.6/arch/powerpc/boot/dts/ebony.dts
===================================================================
--- working-2.6.orig/arch/powerpc/boot/dts/ebony.dts 2007-05-21 12:47:17.000000000 +1000
+++ working-2.6/arch/powerpc/boot/dts/ebony.dts 2007-05-28 15:54:59.000000000 +1000
@@ -135,11 +135,9 @@
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; // Filled in by zImage
- ranges = <0 00000000 fff00000 100000
- 1 00000000 48000000 100000
- 2 00000000 ff800000 400000
- 3 00000000 48200000 100000
- 7 00000000 48300000 100000>;
+ // ranges property is supplied by zImage
+ // based on firmware's configuration of the
+ // EBC bridge
interrupts = <5 4>;
interrupt-parent = <&UIC1>;
Index: working-2.6/arch/powerpc/boot/44x.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/44x.c 2007-05-28 15:42:37.000000000 +1000
+++ working-2.6/arch/powerpc/boot/44x.c 2007-05-28 15:42:37.000000000 +1000
@@ -54,3 +54,32 @@ void ibm44x_dbcr_reset(void)
);
}
+
+/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
+ * banks into the OPB address space */
+void ibm4xx_fixup_ebc_ranges(const char *ebc)
+{
+ void *devp;
+ u32 bxcr;
+ u32 ranges[EBC_NUM_BANKS*4];
+ u32 *p = ranges;
+ int i;
+
+ for (i = 0; i < EBC_NUM_BANKS; i++) {
+ mtdcr(DCRN_EBC0_CFGADDR, EBC_BXCR(i));
+ bxcr = mfdcr(DCRN_EBC0_CFGDATA);
+
+ if ((bxcr & EBC_BXCR_BU) != EBC_BXCR_BU_OFF) {
+ *p++ = i;
+ *p++ = 0;
+ *p++ = bxcr & EBC_BXCR_BAS;
+ *p++ = EBC_BXCR_BANK_SIZE(bxcr);
+ }
+ }
+
+ devp = finddevice(ebc);
+ if (! devp)
+ fatal("Couldn't locate EBC node %s\n\r", ebc);
+
+ setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
+}
Index: working-2.6/arch/powerpc/boot/44x.h
===================================================================
--- working-2.6.orig/arch/powerpc/boot/44x.h 2007-05-28 15:42:37.000000000 +1000
+++ working-2.6/arch/powerpc/boot/44x.h 2007-05-28 15:42:37.000000000 +1000
@@ -11,6 +11,7 @@
#define _PPC_BOOT_44X_H_
void ibm44x_fixup_memsize(void);
+void ibm4xx_fixup_ebc_ranges(const char *ebc);
void ibm44x_dbcr_reset(void);
void ebony_init(void *mac0, void *mac1);
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 12/13] Don't store a command line in the Holly device tree
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (10 preceding siblings ...)
2007-06-13 4:53 ` [PATCH 13/13] Fix problems with device tree representation of TSI-1xx bridges David Gibson
@ 2007-06-13 4:53 ` David Gibson
2007-06-13 4:53 ` [PATCH 11/13] Consolidate cuboot initialization code David Gibson
` (2 subsequent siblings)
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:53 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Currently, the Holly device tree includes a bootargs property in
/chosen, which gives a commandline. This is somewhat inconvenient,
because it means an alternative default command line can't be given in
the kernel config - the value obtained from the dts via the
bootwrapper will always override CONFIG_CMDLINE.
This patch removes the command line from the dts, and instead puts the
same command line as a default in holly_defconfig.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/boot/dts/holly.dts | 1 -
arch/powerpc/configs/holly_defconfig | 3 ++-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: working-2.6/arch/powerpc/boot/dts/holly.dts
===================================================================
--- working-2.6.orig/arch/powerpc/boot/dts/holly.dts 2007-05-08 14:58:06.000000000 +1000
+++ working-2.6/arch/powerpc/boot/dts/holly.dts 2007-05-24 13:55:38.000000000 +1000
@@ -193,6 +193,5 @@
chosen {
linux,stdout-path = "/tsi109@c0000000/serial@7808";
- bootargs = "console=ttyS0,115200";
};
};
Index: working-2.6/arch/powerpc/configs/holly_defconfig
===================================================================
--- working-2.6.orig/arch/powerpc/configs/holly_defconfig 2007-05-24 13:55:53.000000000 +1000
+++ working-2.6/arch/powerpc/configs/holly_defconfig 2007-05-24 13:56:16.000000000 +1000
@@ -182,7 +182,8 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_PROC_DEVICETREE=y
-# CONFIG_CMDLINE_BOOL is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttyS0,115200"
# CONFIG_PM is not set
# CONFIG_SECCOMP is not set
# CONFIG_WANT_DEVICE_TREE is not set
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 11/13] Consolidate cuboot initialization code
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (11 preceding siblings ...)
2007-06-13 4:53 ` [PATCH 12/13] Don't store a command line in the Holly device tree David Gibson
@ 2007-06-13 4:53 ` David Gibson
2007-06-13 5:10 ` [0/13] Queued patches for 2.6.13 Segher Boessenkool
2007-06-13 6:09 ` [0/13] Queued patches for 2.6.23 David Gibson
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:53 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
The various cuboot platforms (i.e. pre-device tree aware u-boot for
83xx, 85xx and Ebony) share a certain amount of code for parsing the
boot parameters. To a certain extent that's inevitable, since they
platforms have different definitions of the bd_t structure. However,
with some macro work and a helper function, this patch improves the
situation a bit.
In the process, this fixes a bug on Ebony, which was incorrectly
handling the parameters passed form u-boot for the command line (the
bug was copied from 83xx and 85xx which have subsequently been fixed).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/boot/Makefile | 2 +-
arch/powerpc/boot/cuboot-83xx.c | 13 ++-----------
arch/powerpc/boot/cuboot-85xx.c | 13 ++-----------
arch/powerpc/boot/cuboot-ebony.c | 16 ++--------------
arch/powerpc/boot/cuboot.c | 35 +++++++++++++++++++++++++++++++++++
arch/powerpc/boot/cuboot.h | 14 ++++++++++++++
6 files changed, 56 insertions(+), 37 deletions(-)
Index: working-2.6/arch/powerpc/boot/cuboot.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/cuboot.c 2007-05-29 17:23:39.000000000 +1000
@@ -0,0 +1,35 @@
+/*
+ * Compatibility for old (not device tree aware) U-Boot versions
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ * Consolidated using macros by David Gibson <david@gibson.dropbear.id.au>
+ *
+ * Copyright 2007 David Gibson, IBM Corporation.
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+
+#include "ppcboot.h"
+
+extern char _end[];
+extern char _dtb_start[], _dtb_end[];
+
+void cuboot_init(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ unsigned long end_of_ram)
+{
+ unsigned long avail_ram = end_of_ram - (unsigned long)_end;
+
+ loader_info.initrd_addr = r4;
+ loader_info.initrd_size = r4 ? r5 - r4 : 0;
+ loader_info.cmdline = (char *)r6;
+ loader_info.cmdline_len = r7 - r6;
+
+ simple_alloc_init(_end, avail_ram - 1024*1024, 32, 64);
+}
Index: working-2.6/arch/powerpc/boot/cuboot-83xx.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/cuboot-83xx.c 2007-05-29 17:23:36.000000000 +1000
+++ working-2.6/arch/powerpc/boot/cuboot-83xx.c 2007-05-29 17:23:39.000000000 +1000
@@ -12,12 +12,12 @@
#include "ops.h"
#include "stdio.h"
+#include "cuboot.h"
#define TARGET_83xx
#include "ppcboot.h"
static bd_t bd;
-extern char _end[];
extern char _dtb_start[], _dtb_end[];
static void platform_fixups(void)
@@ -52,16 +52,7 @@ static void platform_fixups(void)
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
- unsigned long end_of_ram = bd.bi_memstart + bd.bi_memsize;
- unsigned long avail_ram = end_of_ram - (unsigned long)_end;
-
- memcpy(&bd, (bd_t *)r3, sizeof(bd));
- loader_info.initrd_addr = r4;
- loader_info.initrd_size = r4 ? r5 - r4 : 0;
- loader_info.cmdline = (char *)r6;
- loader_info.cmdline_len = r7 - r6;
-
- simple_alloc_init(_end, avail_ram - 1024*1024, 32, 64);
+ CUBOOT_INIT();
ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
serial_console_init();
platform_ops.fixups = platform_fixups;
Index: working-2.6/arch/powerpc/boot/cuboot-85xx.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/cuboot-85xx.c 2007-05-29 17:23:36.000000000 +1000
+++ working-2.6/arch/powerpc/boot/cuboot-85xx.c 2007-05-29 17:23:39.000000000 +1000
@@ -12,12 +12,12 @@
#include "ops.h"
#include "stdio.h"
+#include "cuboot.h"
#define TARGET_85xx
#include "ppcboot.h"
static bd_t bd;
-extern char _end[];
extern char _dtb_start[], _dtb_end[];
static void platform_fixups(void)
@@ -53,16 +53,7 @@ static void platform_fixups(void)
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
- unsigned long end_of_ram = bd.bi_memstart + bd.bi_memsize;
- unsigned long avail_ram = end_of_ram - (unsigned long)_end;
-
- memcpy(&bd, (bd_t *)r3, sizeof(bd));
- loader_info.initrd_addr = r4;
- loader_info.initrd_size = r4 ? r5 - r4 : 0;
- loader_info.cmdline = (char *)r6;
- loader_info.cmdline_len = r7 - r6;
-
- simple_alloc_init(_end, avail_ram - 1024*1024, 32, 64);
+ CUBOOT_INIT();
ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
serial_console_init();
platform_ops.fixups = platform_fixups;
Index: working-2.6/arch/powerpc/boot/cuboot.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/cuboot.h 2007-05-29 17:23:39.000000000 +1000
@@ -0,0 +1,14 @@
+#ifndef _PPC_BOOT_CUBOOT_H_
+#define _PPC_BOOT_CUBOOT_H_
+
+void cuboot_init(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ unsigned long end_of_ram);
+
+#define CUBOOT_INIT() \
+ do { \
+ memcpy(&bd, (bd_t *)r3, sizeof(bd)); \
+ cuboot_init(r4, r5, r6, r7, bd.bi_memstart + bd.bi_memsize); \
+ } while (0)
+
+#endif /* _PPC_BOOT_CUBOOT_H_ */
Index: working-2.6/arch/powerpc/boot/cuboot-ebony.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/cuboot-ebony.c 2007-05-29 17:23:36.000000000 +1000
+++ working-2.6/arch/powerpc/boot/cuboot-ebony.c 2007-05-29 17:23:39.000000000 +1000
@@ -15,28 +15,16 @@
#include "ops.h"
#include "stdio.h"
#include "44x.h"
+#include "cuboot.h"
#define TARGET_44x
#include "ppcboot.h"
static bd_t bd;
-extern char _end[];
-
-BSS_STACK(4096);
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
- unsigned long end_of_ram = bd.bi_memstart + bd.bi_memsize;
- unsigned long avail_ram = end_of_ram - (unsigned long)_end;
-
- memcpy(&bd, (bd_t *)r3, sizeof(bd));
- loader_info.initrd_addr = r4;
- loader_info.initrd_size = r4 ? r5 : 0;
- loader_info.cmdline = (char *)r6;
- loader_info.cmdline_len = r7 - r6;
-
- simple_alloc_init(_end, avail_ram, 32, 64);
-
+ CUBOOT_INIT();
ebony_init(&bd.bi_enetaddr, &bd.bi_enet1addr);
}
Index: working-2.6/arch/powerpc/boot/Makefile
===================================================================
--- working-2.6.orig/arch/powerpc/boot/Makefile 2007-05-29 17:23:53.000000000 +1000
+++ working-2.6/arch/powerpc/boot/Makefile 2007-05-29 17:24:16.000000000 +1000
@@ -44,7 +44,7 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
- 44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c
+ 44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c
src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c
src-boot := $(src-wlib) $(src-plat) empty.c
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 13/13] Fix problems with device tree representation of TSI-1xx bridges
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (9 preceding siblings ...)
2007-06-13 4:52 ` [PATCH 10/13] Derive ebc ranges property from EBC registers David Gibson
@ 2007-06-13 4:53 ` David Gibson
2007-06-14 14:24 ` Segher Boessenkool
2007-06-13 4:53 ` [PATCH 12/13] Don't store a command line in the Holly device tree David Gibson
` (3 subsequent siblings)
14 siblings, 1 reply; 24+ messages in thread
From: David Gibson @ 2007-06-13 4:53 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
This patch fixes some problems with the way the some things
represented in the device tree for the Holly and Taiga boards. This
means changes both to the dts files, and to the code which
instantiates the tsi108 ethernet platform devices based on the device
tree.
- First, and most importantly, the ethernet PHYs are given
with an identical 'reg' property. This reg currently encodes the
accessible register used to initiate mdio interaction with the PHYs,
rather than a meaningful address on the parent bus (mdio in this
case), which is incorrect. Instead we give the address of these
registers as 'reg' in the mdio node itself, and encode the ID of each
phy in their 'reg' propertyies.
- Currently the platform device constructor enables a
workaround in the tsi108 ethernet driver based on the compatible
property of the PHY. This is incorrect, because the workaround in
question is necessary due to the board's wiring of the PHY, not the
model of PHY itself. This patch alters the constructor to instead
enable the workaround based on a new special property in the PHY node.
- The compatible properties on a number of nodes in the device
tree are insufficiently precise. In particular the PHYs give only
"bcm54xx", which is broken, since there are many bcm54xx PHY models,
and they have differences which matter. The mdio had a compatible
property of "tsi-ethernet" identical to the ethernet MAC nodes, which
doesn't make sense. The ethernet, i2c, bridge and PCI nodes were
given only as "tsi-*" which is somewhat inprecise, we replace with
"tsi108-*" in the case of Taiga (which has a TSI108 bridge), and
"tsi109-*", "tsi108-*" in the case of Holly (which has a TSI109
bridge).
- We remove some "model" properties from the ethernets on
Taiga board which were neither useful nor adequately precise.
- On Holly we change to using a dtc label instead of a full
path to reference the MPIC node, which makes the dts a little more
readable.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/boot/dts/holly.dts | 51 ++++++++++++++++++----------------
arch/powerpc/boot/dts/mpc7448hpc2.dts | 33 ++++++++++------------
arch/powerpc/sysdev/tsi108_dev.c | 33 ++++++++++++++--------
3 files changed, 65 insertions(+), 52 deletions(-)
Index: working-2.6/arch/powerpc/boot/dts/holly.dts
===================================================================
--- working-2.6.orig/arch/powerpc/boot/dts/holly.dts 2007-06-13 14:40:27.000000000 +1000
+++ working-2.6/arch/powerpc/boot/dts/holly.dts 2007-06-13 14:40:27.000000000 +1000
@@ -46,7 +46,7 @@
tsi109@c0000000 {
device_type = "tsi-bridge";
- compatible = "tsi-bridge";
+ compatible = "tsi109-bridge", "tsi108-bridge";
#address-cells = <1>;
#size-cells = <1>;
ranges = <00000000 c0000000 00010000>;
@@ -54,52 +54,55 @@
i2c@7000 {
device_type = "i2c";
- compatible = "tsi-i2c";
- interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
+ compatible = "tsi109-i2c", "tsi108-i2c";
+ interrupt-parent = <&MPIC>;
interrupts = <e 2>;
reg = <7000 400>;
};
- mdio@6000 {
+ MDIO: mdio@6000 {
device_type = "mdio";
- compatible = "tsi-ethernet";
+ compatible = "tsi109-mdio", "tsi108-mdio";
+ reg = <6000 50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- PHY1: ethernet-phy@6000 {
- device_type = "ethernet-phy";
- compatible = "bcm54xx";
- reg = <6000 50>;
- phy-id = <1>;
+ PHY1: ethernet-phy@1 {
+ compatible = "bcm5461a";
+ reg = <1>;
+ txc-rxc-delay-disable;
};
- PHY2: ethernet-phy@6400 {
- device_type = "ethernet-phy";
- compatible = "bcm54xx";
- reg = <6000 50>;
- phy-id = <2>;
+ PHY2: ethernet-phy@2 {
+ compatible = "bcm5461a";
+ reg = <2>;
+ txc-rxc-delay-disable;
};
};
ethernet@6200 {
device_type = "network";
- compatible = "tsi-ethernet";
+ compatible = "tsi109-ethernet", "tsi108-ethernet";
#address-cells = <1>;
#size-cells = <0>;
reg = <6000 200>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
+ interrupt-parent = <&MPIC>;
interrupts = <10 2>;
+ mdio-handle = <&MDIO>;
phy-handle = <&PHY1>;
};
ethernet@6600 {
device_type = "network";
- compatible = "tsi-ethernet";
+ compatible = "tsi109-ethernet", "tsi108-ethernet";
#address-cells = <1>;
#size-cells = <0>;
reg = <6400 200>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
+ interrupt-parent = <&MPIC>;
interrupts = <11 2>;
+ mdio-handle = <&MDIO>;
phy-handle = <&PHY2>;
};
@@ -110,7 +113,7 @@
virtual-reg = <c0007808>;
clock-frequency = <3F9C6000>;
current-speed = <1c200>;
- interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
+ interrupt-parent = <&MPIC>;
interrupts = <c 2>;
};
@@ -121,7 +124,7 @@
virtual-reg = <c0007c08>;
clock-frequency = <3F9C6000>;
current-speed = <1c200>;
- interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
+ interrupt-parent = <&MPIC>;
interrupts = <d 2>;
};
@@ -136,7 +139,7 @@
pci@1000 {
device_type = "pci";
- compatible = "tsi109";
+ compatible = "tsi109-pci", "tsi108-pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
@@ -150,7 +153,7 @@
ranges = <02000000 0 40000000 40000000 0 10000000
01000000 0 00000000 7e000000 0 00010000>;
clock-frequency = <7f28154>;
- interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
+ interrupt-parent = <&MPIC>;
interrupts = <17 2>;
interrupt-map-mask = <f800 0 0 7>;
/*----------------------------------------------------+
@@ -186,7 +189,7 @@
#address-cells = <0>;
#interrupt-cells = <2>;
interrupts = <17 2>;
- interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
+ interrupt-parent = <&MPIC>;
};
};
};
Index: working-2.6/arch/powerpc/sysdev/tsi108_dev.c
===================================================================
--- working-2.6.orig/arch/powerpc/sysdev/tsi108_dev.c 2007-05-08 14:58:06.000000000 +1000
+++ working-2.6/arch/powerpc/sysdev/tsi108_dev.c 2007-06-13 14:40:27.000000000 +1000
@@ -72,12 +72,11 @@ static int __init tsi108_eth_of_init(voi
int ret;
for (np = NULL, i = 0;
- (np = of_find_compatible_node(np, "network", "tsi-ethernet")) != NULL;
+ (np = of_find_compatible_node(np, "network", "tsi108-ethernet")) != NULL;
i++) {
struct resource r[2];
- struct device_node *phy;
+ struct device_node *phy, *mdio;
hw_info tsi_eth_data;
- const unsigned int *id;
const unsigned int *phy_id;
const void *mac_addr;
const phandle *ph;
@@ -111,6 +110,13 @@ static int __init tsi108_eth_of_init(voi
if (mac_addr)
memcpy(tsi_eth_data.mac_addr, mac_addr, 6);
+ ph = of_get_property(np, "mdio-handle", NULL);
+ mdio = of_find_node_by_phandle(*ph);
+ ret = of_address_to_resource(mdio, 0, &res);
+ of_node_put(mdio);
+ if (ret)
+ goto unreg;
+
ph = of_get_property(np, "phy-handle", NULL);
phy = of_find_node_by_phandle(*ph);
@@ -119,20 +125,25 @@ static int __init tsi108_eth_of_init(voi
goto unreg;
}
- id = of_get_property(phy, "reg", NULL);
- phy_id = of_get_property(phy, "phy-id", NULL);
- ret = of_address_to_resource(phy, 0, &res);
- if (ret) {
- of_node_put(phy);
- goto unreg;
- }
+ phy_id = of_get_property(phy, "reg", NULL);
+
tsi_eth_data.regs = r[0].start;
tsi_eth_data.phyregs = res.start;
tsi_eth_data.phy = *phy_id;
tsi_eth_data.irq_num = irq_of_parse_and_map(np, 0);
- if (of_device_is_compatible(phy, "bcm54xx"))
+
+ /* Some boards with the TSI108 bridge (e.g. Holly)
+ * have a miswiring of the ethernet PHYs which
+ * requires a workaround. The special
+ * "txc-rxc-delay-disable" property enables this
+ * workaround. FIXME: Need to port the tsi108_eth
+ * driver itself to phylib and use a non-misleading
+ * name for the workaround flag - it's not actually to
+ * do with the model of PHY in use */
+ if (of_get_property(phy, "txc-rxc-delay-disable", NULL))
tsi_eth_data.phy_type = TSI108_PHY_BCM54XX;
of_node_put(phy);
+
ret =
platform_device_add_data(tsi_eth_dev, &tsi_eth_data,
sizeof(hw_info));
Index: working-2.6/arch/powerpc/boot/dts/mpc7448hpc2.dts
===================================================================
--- working-2.6.orig/arch/powerpc/boot/dts/mpc7448hpc2.dts 2007-05-21 12:47:17.000000000 +1000
+++ working-2.6/arch/powerpc/boot/dts/mpc7448hpc2.dts 2007-06-13 14:40:27.000000000 +1000
@@ -45,7 +45,7 @@
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
- device_type = "tsi-bridge";
+ device_type = "tsi108-bridge";
ranges = <00000000 c0000000 00010000>;
reg = <c0000000 00010000>;
bus-frequency = <0>;
@@ -55,27 +55,26 @@
interrupts = <E 0>;
reg = <7000 400>;
device_type = "i2c";
- compatible = "tsi-i2c";
+ compatible = "tsi108-i2c";
};
- mdio@6000 {
+ MDIO: mdio@6000 {
device_type = "mdio";
- compatible = "tsi-ethernet";
+ compatible = "tsi108-mdio";
+ reg = <6000 50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- phy8: ethernet-phy@6000 {
+ phy8: ethernet-phy@8 {
interrupt-parent = <&mpic>;
interrupts = <2 1>;
- reg = <6000 50>;
- phy-id = <8>;
- device_type = "ethernet-phy";
+ reg = <8>;
};
- phy9: ethernet-phy@6400 {
+ phy9: ethernet-phy@9 {
interrupt-parent = <&mpic>;
interrupts = <2 1>;
- reg = <6000 50>;
- phy-id = <9>;
- device_type = "ethernet-phy";
+ reg = <9>;
};
};
@@ -83,12 +82,12 @@
ethernet@6200 {
#size-cells = <0>;
device_type = "network";
- model = "TSI-ETH";
- compatible = "tsi-ethernet";
+ compatible = "tsi108-ethernet";
reg = <6000 200>;
address = [ 00 06 D2 00 00 01 ];
interrupts = <10 2>;
interrupt-parent = <&mpic>;
+ mdio-handle = <&MDIO>;
phy-handle = <&phy8>;
};
@@ -96,12 +95,12 @@
#address-cells = <1>;
#size-cells = <0>;
device_type = "network";
- model = "TSI-ETH";
- compatible = "tsi-ethernet";
+ compatible = "tsi108-ethernet";
reg = <6400 200>;
address = [ 00 06 D2 00 00 02 ];
interrupts = <11 2>;
interrupt-parent = <&mpic>;
+ mdio-handle = <&MDIO>;
phy-handle = <&phy9>;
};
@@ -135,7 +134,7 @@
big-endian;
};
pci@1000 {
- compatible = "tsi10x";
+ compatible = "tsi108-pci";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [0/13] Queued patches for 2.6.13
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (12 preceding siblings ...)
2007-06-13 4:53 ` [PATCH 11/13] Consolidate cuboot initialization code David Gibson
@ 2007-06-13 5:10 ` Segher Boessenkool
2007-06-13 6:09 ` [0/13] Queued patches for 2.6.23 David Gibson
14 siblings, 0 replies; 24+ messages in thread
From: Segher Boessenkool @ 2007-06-13 5:10 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras
> Here's my current queue of patches which I'm hoping will go in for
> 2.6.13. If they could go into an appropriate branch of powerpc.git in
> the meantime that would be great.
2.6.13?!?
Segher
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [0/13] Queued patches for 2.6.23
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
` (13 preceding siblings ...)
2007-06-13 5:10 ` [0/13] Queued patches for 2.6.13 Segher Boessenkool
@ 2007-06-13 6:09 ` David Gibson
14 siblings, 0 replies; 24+ messages in thread
From: David Gibson @ 2007-06-13 6:09 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
On Wed, Jun 13, 2007 at 02:50:31PM +1000, David Gibson wrote:
> Hi Paul,
>
> Here's my current queue of patches which I'm hoping will go in for
> 2.6.13. If they could go into an appropriate branch of powerpc.git in
> the meantime that would be great.
Blah. That should be 2.6.23, of course.
<looks sheepish>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 6/13] Start factoring pgtable-ppc32.h and pgtable-ppc64.h
2007-06-13 4:52 ` [PATCH 6/13] Start factoring pgtable-ppc32.h and pgtable-ppc64.h David Gibson
@ 2007-06-14 14:05 ` Segher Boessenkool
0 siblings, 0 replies; 24+ messages in thread
From: Segher Boessenkool @ 2007-06-14 14:05 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
+ remap_pfn_range(vma, vaddr, pfn, size, prot)
Patch is mangled... This is from the raw source I
received, it isn't my mail reader this time ;-)
Segher
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 10/13] Derive ebc ranges property from EBC registers
2007-06-13 4:52 ` [PATCH 10/13] Derive ebc ranges property from EBC registers David Gibson
@ 2007-06-14 14:12 ` Segher Boessenkool
2007-06-14 14:14 ` Segher Boessenkool
1 sibling, 0 replies; 24+ messages in thread
From: Segher Boessenkool @ 2007-06-14 14:12 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras
> + // ranges property is supplied by zImage
> + // based on firmware's configuration of the
> + // EBC bridge
s/zImage/the bootwrapper/ ?
Segher
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 10/13] Derive ebc ranges property from EBC registers
2007-06-13 4:52 ` [PATCH 10/13] Derive ebc ranges property from EBC registers David Gibson
2007-06-14 14:12 ` Segher Boessenkool
@ 2007-06-14 14:14 ` Segher Boessenkool
1 sibling, 0 replies; 24+ messages in thread
From: Segher Boessenkool @ 2007-06-14 14:14 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras
> This patch replaces the hardcoded mappings with code in the zImage to
> read the EBC configuration registers and create an appropriate ranges
> property based on them.
Perhaps you should only do this if the device tree passed
to the bootwrapper doesn't already have a "ranges" property?
Segher
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 13/13] Fix problems with device tree representation of TSI-1xx bridges
2007-06-13 4:53 ` [PATCH 13/13] Fix problems with device tree representation of TSI-1xx bridges David Gibson
@ 2007-06-14 14:24 ` Segher Boessenkool
0 siblings, 0 replies; 24+ messages in thread
From: Segher Boessenkool @ 2007-06-14 14:24 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras
> The ethernet, i2c, bridge and PCI nodes were
> given only as "tsi-*" which is somewhat inprecise, we replace with
> "tsi108-*" in the case of Taiga (which has a TSI108 bridge), and
> "tsi109-*", "tsi108-*" in the case of Holly (which has a TSI109
> bridge).
To be sure -- are all those ts109 devices actually
compatible to their ancestors on tsi108?
Since I _have_ to complain about _something_ -- don't
you run a spellchecker on your commit messages? :-)
Perfect patch as far as I can see, thank you David!
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
Segher
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c
2007-06-13 4:52 ` [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c David Gibson
@ 2007-06-14 21:04 ` Kumar Gala
2007-06-14 21:50 ` Andy Fleming
0 siblings, 1 reply; 24+ messages in thread
From: Kumar Gala @ 2007-06-14 21:04 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras
On Jun 12, 2007, at 11:52 PM, David Gibson wrote:
> In arch/powerpc/mm/pgtable_32.c, the varialbe io_bat_index and the
> macro is_power_of_4() no longer have any users. This patch removes
> them.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
>
> arch/powerpc/mm/pgtable_32.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> Index: working-2.6/arch/powerpc/mm/pgtable_32.c
> ===================================================================
> --- working-2.6.orig/arch/powerpc/mm/pgtable_32.c 2007-05-10
> 14:13:36.000000000 +1000
> +++ working-2.6/arch/powerpc/mm/pgtable_32.c 2007-05-10
> 14:13:44.000000000 +1000
> @@ -36,7 +36,6 @@
> unsigned long ioremap_base;
> unsigned long ioremap_bot;
> EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
> -int io_bat_index;
>
> #if defined(CONFIG_6xx) || defined(CONFIG_POWER3)
> #define HAVE_BATS 1
> @@ -299,9 +298,6 @@ void __init mapin_ram(void)
> }
> }
>
> -/* is x a power of 4? */
> -#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
> -
is_power_of_4 is used by HAVE_TLBCAM, why are you killing it?
- k
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c
2007-06-14 21:04 ` Kumar Gala
@ 2007-06-14 21:50 ` Andy Fleming
2007-06-15 15:40 ` Kumar Gala
0 siblings, 1 reply; 24+ messages in thread
From: Andy Fleming @ 2007-06-14 21:50 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras, David Gibson
On Jun 14, 2007, at 16:04, Kumar Gala wrote:
>
> On Jun 12, 2007, at 11:52 PM, David Gibson wrote:
>>
>> -/* is x a power of 4? */
>> -#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
>> -
>
> is_power_of_4 is used by HAVE_TLBCAM, why are you killing it?
He removed io_block_mapping() in patch #3
Andy
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c
2007-06-14 21:50 ` Andy Fleming
@ 2007-06-15 15:40 ` Kumar Gala
0 siblings, 0 replies; 24+ messages in thread
From: Kumar Gala @ 2007-06-15 15:40 UTC (permalink / raw)
To: Andy Fleming; +Cc: linuxppc-dev, Paul Mackerras, David Gibson
On Jun 14, 2007, at 4:50 PM, Andy Fleming wrote:
>
> On Jun 14, 2007, at 16:04, Kumar Gala wrote:
>
>>
>> On Jun 12, 2007, at 11:52 PM, David Gibson wrote:
>>>
>>> -/* is x a power of 4? */
>>> -#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
>>> -
>>
>> is_power_of_4 is used by HAVE_TLBCAM, why are you killing it?
>
>
> He removed io_block_mapping() in patch #3
Ahh, thanks.
- k
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 3/13] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc
2007-06-13 4:52 ` [PATCH 3/13] Abolish iopa(), mm_ptov(), io_block_mapping() " David Gibson
@ 2007-06-16 0:55 ` Benjamin Herrenschmidt
0 siblings, 0 replies; 24+ messages in thread
From: Benjamin Herrenschmidt @ 2007-06-16 0:55 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Paul Mackerras
On Wed, 2007-06-13 at 14:52 +1000, David Gibson wrote:
> These old-fashioned IO mapping functions no longer have any callers in
> code which remains relevant on arch/powerpc. Therefore, this patch
> removes them from arch/powerpc.
I think we still want a way to setup some hand crafted BATs... maybe a
special flag to pass to ioremap_flags ?
It makes sense to map some heavily accessed on chip register space with
a BAT on embedded. The reason I didn't like io_block_mapping() was
because the virtual address was hard coded. But I don't think we should
throw the baby with the bath water. If we can have it allocate the virt
address using the ioremap_bot trick, that would be a good thing to keep
around.
Ben.
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2007-06-16 0:55 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-06-13 4:50 [0/13] Queued patches for 2.6.13 David Gibson
2007-06-13 4:52 ` [PATCH 2/13] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU David Gibson
2007-06-13 4:52 ` [PATCH 4/13] Remove the dregs of APUS support from arch/powerpc David Gibson
2007-06-13 4:52 ` [PATCH 3/13] Abolish iopa(), mm_ptov(), io_block_mapping() " David Gibson
2007-06-16 0:55 ` Benjamin Herrenschmidt
2007-06-13 4:52 ` [PATCH 1/13] Split low-level OF-related bootloader code into separate files David Gibson
2007-06-13 4:52 ` [PATCH 6/13] Start factoring pgtable-ppc32.h and pgtable-ppc64.h David Gibson
2007-06-14 14:05 ` Segher Boessenkool
2007-06-13 4:52 ` [PATCH 5/13] Remove a couple of unused definitions from pgtable_32.c David Gibson
2007-06-14 21:04 ` Kumar Gala
2007-06-14 21:50 ` Andy Fleming
2007-06-15 15:40 ` Kumar Gala
2007-06-13 4:52 ` [PATCH 7/13] Kill typedef-ed structs for hash PTEs and BATs David Gibson
2007-06-13 4:52 ` [PATCH 8/13] Merge CPU features pertaining to icache coherency David Gibson
2007-06-13 4:52 ` [PATCH 9/13] Factor zImage's 44x reset code out of ebony.c David Gibson
2007-06-13 4:52 ` [PATCH 10/13] Derive ebc ranges property from EBC registers David Gibson
2007-06-14 14:12 ` Segher Boessenkool
2007-06-14 14:14 ` Segher Boessenkool
2007-06-13 4:53 ` [PATCH 13/13] Fix problems with device tree representation of TSI-1xx bridges David Gibson
2007-06-14 14:24 ` Segher Boessenkool
2007-06-13 4:53 ` [PATCH 12/13] Don't store a command line in the Holly device tree David Gibson
2007-06-13 4:53 ` [PATCH 11/13] Consolidate cuboot initialization code David Gibson
2007-06-13 5:10 ` [0/13] Queued patches for 2.6.13 Segher Boessenkool
2007-06-13 6:09 ` [0/13] Queued patches for 2.6.23 David Gibson
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