From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: To: Paul Mackerras , Josh Boyer From: David Gibson Subject: [PATCH 3/3] Improve robustness of the UIC cascade handler In-Reply-To: <20070814034811.GA8791@localhost.localdomain> Message-Id: <20070814035242.CAE2BDDEFD@ozlabs.org> Date: Tue, 14 Aug 2007 13:52:42 +1000 (EST) Cc: linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , At present the cascade interrupt handler for the UIC (interrupt controller on 4xx embedded chips) will misbehave badly if it is called spuriously - that is if the handler is invoked when no interrupts are asserted in the child UIC. Although spurious interrupts shouldn't happen, it's good to behave robustly if they do. This patch does so by checking for and ignoring spurious interrupts. Signed-off-by: Valentine Barshak Signed-off-by: David Gibson --- arch/powerpc/sysdev/uic.c | 3 +++ 1 file changed, 3 insertions(+) Index: working-2.6/arch/powerpc/sysdev/uic.c =================================================================== --- working-2.6.orig/arch/powerpc/sysdev/uic.c 2007-08-14 13:46:02.000000000 +1000 +++ working-2.6/arch/powerpc/sysdev/uic.c 2007-08-14 13:46:02.000000000 +1000 @@ -266,6 +266,9 @@ irqreturn_t uic_cascade(int virq, void * int subvirq; msr = mfdcr(uic->dcrbase + UIC_MSR); + if (!msr) /* spurious interrupt */ + return IRQ_HANDLED; + src = 32 - ffs(msr); subvirq = irq_linear_revmap(uic->irqhost, src);