From: travis@sgi.com
To: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-mm@kvack.org, Andi Kleen <ak@suse.de>,
linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
sparclinux@vger.kernel.org, Christoph Lameter <clameter@sgi.com>
Subject: [PATCH 00/10] x86: Reduce Memory Usage and Inter-Node message traffic (v3)
Date: Tue, 11 Sep 2007 18:56:44 -0700 [thread overview]
Message-ID: <20070912015644.927677070@sgi.com> (raw)
Note:
This patch consolidates all the previous patches regarding
the conversion of static arrays sized by NR_CPUS into per_cpu
data arrays and is referenced against 2.6.23-rc6 .
v1 Intro:
In x86_64 and i386 architectures most arrays that are sized
using NR_CPUS lay in local memory on node 0. Not only will most
(99%?) of the systems not use all the slots in these arrays,
particularly when NR_CPUS is increased to accommodate future
very high cpu count systems, but a number of cache lines are
passed unnecessarily on the system bus when these arrays are
referenced by cpus on other nodes.
Typically, the values in these arrays are referenced by the cpu
accessing it's own values, though when passing IPI interrupts,
the cpu does access the data relevant to the targeted cpu/node.
Of course, if the referencing cpu is not on node 0, then the
reference will still require cross node exchanges of cache
lines. A common use of this is for an interrupt service
routine to pass the interrupt to other cpus local to that node.
Ideally, all the elements in these arrays should be moved to the
per_cpu data area. In some cases (such as x86_cpu_to_apicid)
the array is referenced before the per_cpu data areas are setup.
In this case, a static array is declared in the __initdata
area and initialized by the booting cpu (BSP). The values are
then moved to the per_cpu area after it is initialized and the
original static array is freed with the rest of the __initdata.
This patch is referenced against 2.6.23-rc6.
--
Changes for version v2:
> > Note the addtional change of the cpu_llc_id type from u8
> > to int for ARCH x86_64 to correspond with ARCH i386.
> At least currently it cannot be more than 8 bit. So why
> waste memory? It would be better to change i386
Done. (x86_64 type => u8).
> > Fix four instances where cpu_to_node is referenced
> > > by array instead of via the cpu_to_node macro. This
> > > is preparation to moving it to the per_cpu data area.
> Shouldn't this patch be logically before the per cpu
> conversion (which is 3). This way the result would
> be git bisectable.
Done. (Moved to PATCH 1).
> > processor_core.c currently tries to determine the apicid by special casing
> > > for IA64 and x86. The desired information is readily available via
> > >
> > > cpu_physical_id()
> > >
> > > on IA64, i386 and x86_64.
>
> Have you tried this with a !CONFIG_SMP build? The drivers/dma code was doing
> the same and running into problems because it wasn't defined there.
Fixed. (New export in PATCH 1).
--
Changes for version v3:
cpu_sibling_map has been converted to a per_cpu data array to fix
build errors on ia64, ppc64 and sparc64 to accomodate references in
block/blktrace.c and kernel/sched.c when CONFIG_SCHED_SMT is defined.
Warning: ppc64 and sparc64 have not yet been built nor tested.
--
--
next reply other threads:[~2007-09-12 1:56 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-12 1:56 travis [this message]
2007-09-12 1:56 ` [PATCH 01/10] x86: remove x86_cpu_to_log_apicid array (v3) travis
2007-09-12 1:56 ` [PATCH 02/10] x86: fix cpu_to_node references (v3) travis
2007-09-12 1:56 ` [PATCH 03/10] x86: Convert cpu_core_map to be a per cpu variable (v3) travis
2007-09-12 1:56 ` [PATCH 04/10] x86: Convert cpu_sibling_map " travis
2007-09-12 1:56 ` [PATCH 05/10] x86: Convert x86_cpu_to_apicid " travis
2007-09-12 1:56 ` [PATCH 06/10] x86: Convert cpu_llc_id " travis
2007-09-12 1:56 ` [PATCH 07/10] x86: acpi-use-cpu_physical_id (v3) travis
2007-09-12 1:56 ` [PATCH 08/10] ia64: Convert cpu_sibling_map to a per_cpu data array (v3) travis
2007-09-28 9:49 ` Paul Jackson
2007-10-03 19:22 ` Mike Travis
2007-09-12 1:56 ` [PATCH 09/10] ppc64: " travis
2007-09-17 6:28 ` Stephen Rothwell
2007-09-17 6:39 ` Stephen Rothwell
2007-09-17 15:22 ` Mike Travis
2007-09-12 1:56 ` [PATCH 10/10] sparc64: " travis
2007-09-13 9:53 ` [PATCH 00/10] x86: Reduce Memory Usage and Inter-Node message traffic (v3) Andi Kleen
2007-09-14 23:32 ` Andrew Morton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20070912015644.927677070@sgi.com \
--to=travis@sgi.com \
--cc=ak@suse.de \
--cc=akpm@linux-foundation.org \
--cc=clameter@sgi.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=linuxppc-dev@ozlabs.org \
--cc=sparclinux@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).