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From: Anton Vorontsov <avorontsov@ru.mvista.com>
To: linuxppc-dev@ozlabs.org
Subject: [PATCH 2/7] [POWERPC] Fix QEIC->MPIC cascading
Date: Tue, 25 Sep 2007 18:34:29 +0400	[thread overview]
Message-ID: <20070925143429.GB5323@localhost.localdomain> (raw)
In-Reply-To: <20070925143126.GA30013@localhost.localdomain>

set_irq_chained_handler overwrites MPIC's handle_irq function
(handle_fasteoi_irq) thus MPIC never gets eoi event from the
cascaded IRQ. This situation hangs MPIC on MPC8568E.

Patch adds flow level "end" handler to the MPIC, and QEIC calls
it when QEIC's interrupt processing finished.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
 arch/powerpc/sysdev/mpic.c         |    3 +++
 arch/powerpc/sysdev/qe_lib/qe_ic.c |    6 ++++++
 2 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 8de29f2..bee2d5b 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -846,6 +846,7 @@ static struct irq_chip mpic_irq_chip = {
 	.mask		= mpic_mask_irq,
 	.unmask		= mpic_unmask_irq,
 	.eoi		= mpic_end_irq,
+	.end		= mpic_end_irq,
 	.set_type	= mpic_set_irq_type,
 };
 
@@ -854,6 +855,7 @@ static struct irq_chip mpic_ipi_chip = {
 	.mask		= mpic_mask_ipi,
 	.unmask		= mpic_unmask_ipi,
 	.eoi		= mpic_end_ipi,
+	.end		= mpic_end_ipi,
 };
 #endif /* CONFIG_SMP */
 
@@ -864,6 +866,7 @@ static struct irq_chip mpic_irq_ht_chip = {
 	.mask		= mpic_mask_irq,
 	.unmask		= mpic_unmask_ht_irq,
 	.eoi		= mpic_end_ht_irq,
+	.end		= mpic_end_ht_irq,
 	.set_type	= mpic_set_irq_type,
 };
 #endif /* CONFIG_MPIC_U3_HT_IRQS */
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 55e6f39..8e743e0 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -328,6 +328,9 @@ void qe_ic_cascade_low(unsigned int irq, struct irq_desc *desc)
 
 	if (cascade_irq != NO_IRQ)
 		generic_handle_irq(cascade_irq);
+
+	if (desc->chip->end)
+		desc->chip->end(irq);
 }
 
 void qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc)
@@ -337,6 +340,9 @@ void qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc)
 
 	if (cascade_irq != NO_IRQ)
 		generic_handle_irq(cascade_irq);
+
+	if (desc->chip->end)
+		desc->chip->end(irq);
 }
 
 void __init qe_ic_init(struct device_node *node, unsigned int flags)
-- 
1.5.0.6

  parent reply	other threads:[~2007-09-25 14:32 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-09-25 14:31 MPC85xx_MDS: Patches to support QE, UCCs and SPI Anton Vorontsov
2007-09-25 14:34 ` [PATCH 1/7] [POWERPC] mpc85xx_mds: select QUICC_ENGINE Anton Vorontsov
2007-09-25 14:34 ` Anton Vorontsov [this message]
2007-10-01 23:14   ` [PATCH 2/7] [POWERPC] Fix QEIC->MPIC cascading Benjamin Herrenschmidt
2007-10-02 12:20     ` Anton Vorontsov
2007-10-02 22:02       ` Benjamin Herrenschmidt
2007-10-04 13:04         ` [RFC][PATCH][POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading Anton Vorontsov
2007-10-04 22:05           ` Benjamin Herrenschmidt
2007-10-05  5:18             ` Kumar Gala
2007-10-05 12:30               ` Anton Vorontsov
2007-09-25 14:34 ` [PATCH 3/7] [POWERPC] QEIC: implement low+high multiplexed IRQ chained handler Anton Vorontsov
2007-09-25 14:34 ` [PATCH 4/7] [POWERPC] QE pario: support for MPC85xx layout Anton Vorontsov
2007-09-25 16:41   ` Kim Phillips
2007-10-05  5:15   ` Kumar Gala
2007-09-25 14:34 ` [PATCH 5/7] [POWERPC] mpc8568mds: update dts to be able to use UCCs Anton Vorontsov
2007-09-25 14:35 ` [PATCH 6/7] [POWERPC] mpc85xx_mds: reset UCC ethernet properly Anton Vorontsov
2007-09-25 14:35 ` [PATCH 7/7] [POWERPC][SPI] spi_mpc83xx: allow use on MPC85xx Anton Vorontsov
2007-09-25 14:48   ` Peter Korsgaard
2007-09-25 15:02     ` [PATCH v2 " Anton Vorontsov
2007-09-25 15:04   ` [spi-devel-general] [PATCH " Kumar Gala
2007-09-25 15:18     ` Anton Vorontsov
2007-09-25 16:58       ` David Brownell
2007-09-26  4:00         ` Kumar Gala
2007-09-26 13:15           ` [PATCH 7/7] [POWERPC][SPI] spi_mpc83xx: allow use on any processors with QUICC Engine Anton Vorontsov

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