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From: Anton Vorontsov <avorontsov@ru.mvista.com>
To: linuxppc-dev@ozlabs.org
Subject: [PATCH 3/7] [POWERPC] QEIC: implement low+high multiplexed IRQ chained handler
Date: Tue, 25 Sep 2007 18:34:35 +0400	[thread overview]
Message-ID: <20070925143435.GC5323@localhost.localdomain> (raw)
In-Reply-To: <20070925143126.GA30013@localhost.localdomain>

For MPC8568E low and high QEIC lines routed to the single MPIC
input, thus low and high sources should be demultiplexed.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
 arch/powerpc/sysdev/qe_lib/qe_ic.c |   34 ++++++++++++++++++++++++++++------
 1 files changed, 28 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 8e743e0..0ecb614 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -345,6 +345,22 @@ void qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc)
 		desc->chip->end(irq);
 }
 
+static void qe_ic_cascade_muxed(unsigned int irq, struct irq_desc *desc)
+{
+	struct qe_ic *qe_ic = desc->handler_data;
+	unsigned int cascade_irq;
+
+	cascade_irq = qe_ic_get_high_irq(qe_ic);
+	if (cascade_irq == NO_IRQ)
+		cascade_irq = qe_ic_get_low_irq(qe_ic);
+
+	if (cascade_irq != NO_IRQ)
+		generic_handle_irq(cascade_irq);
+
+	if (desc->chip->end)
+		desc->chip->end(irq);
+}
+
 void __init qe_ic_init(struct device_node *node, unsigned int flags)
 {
 	struct qe_ic *qe_ic;
@@ -404,12 +420,18 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags)
 
 	qe_ic_write(qe_ic->regs, QEIC_CICR, temp);
 
-	set_irq_data(qe_ic->virq_low, qe_ic);
-	set_irq_chained_handler(qe_ic->virq_low, qe_ic_cascade_low);
-
-	if (qe_ic->virq_high != NO_IRQ) {
-		set_irq_data(qe_ic->virq_high, qe_ic);
-		set_irq_chained_handler(qe_ic->virq_high, qe_ic_cascade_high);
+	if (qe_ic->virq_high == qe_ic->virq_low) {
+		set_irq_data(qe_ic->virq_low, qe_ic);
+		set_irq_chained_handler(qe_ic->virq_low, qe_ic_cascade_muxed);
+	} else {
+		set_irq_data(qe_ic->virq_low, qe_ic);
+		set_irq_chained_handler(qe_ic->virq_low, qe_ic_cascade_low);
+
+		if (qe_ic->virq_high != NO_IRQ) {
+			set_irq_data(qe_ic->virq_high, qe_ic);
+			set_irq_chained_handler(qe_ic->virq_high,
+						qe_ic_cascade_high);
+		}
 	}
 
 	printk("QEIC (%d IRQ sources) at %p\n", NR_QE_IC_INTS, qe_ic->regs);
-- 
1.5.0.6

  parent reply	other threads:[~2007-09-25 14:32 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-09-25 14:31 MPC85xx_MDS: Patches to support QE, UCCs and SPI Anton Vorontsov
2007-09-25 14:34 ` [PATCH 1/7] [POWERPC] mpc85xx_mds: select QUICC_ENGINE Anton Vorontsov
2007-09-25 14:34 ` [PATCH 2/7] [POWERPC] Fix QEIC->MPIC cascading Anton Vorontsov
2007-10-01 23:14   ` Benjamin Herrenschmidt
2007-10-02 12:20     ` Anton Vorontsov
2007-10-02 22:02       ` Benjamin Herrenschmidt
2007-10-04 13:04         ` [RFC][PATCH][POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading Anton Vorontsov
2007-10-04 22:05           ` Benjamin Herrenschmidt
2007-10-05  5:18             ` Kumar Gala
2007-10-05 12:30               ` Anton Vorontsov
2007-09-25 14:34 ` Anton Vorontsov [this message]
2007-09-25 14:34 ` [PATCH 4/7] [POWERPC] QE pario: support for MPC85xx layout Anton Vorontsov
2007-09-25 16:41   ` Kim Phillips
2007-10-05  5:15   ` Kumar Gala
2007-09-25 14:34 ` [PATCH 5/7] [POWERPC] mpc8568mds: update dts to be able to use UCCs Anton Vorontsov
2007-09-25 14:35 ` [PATCH 6/7] [POWERPC] mpc85xx_mds: reset UCC ethernet properly Anton Vorontsov
2007-09-25 14:35 ` [PATCH 7/7] [POWERPC][SPI] spi_mpc83xx: allow use on MPC85xx Anton Vorontsov
2007-09-25 14:48   ` Peter Korsgaard
2007-09-25 15:02     ` [PATCH v2 " Anton Vorontsov
2007-09-25 15:04   ` [spi-devel-general] [PATCH " Kumar Gala
2007-09-25 15:18     ` Anton Vorontsov
2007-09-25 16:58       ` David Brownell
2007-09-26  4:00         ` Kumar Gala
2007-09-26 13:15           ` [PATCH 7/7] [POWERPC][SPI] spi_mpc83xx: allow use on any processors with QUICC Engine Anton Vorontsov

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