From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from az33egw01.freescale.net (az33egw01.freescale.net [192.88.158.102]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "az33egw01.freescale.net", Issuer "Thawte Premium Server CA" (verified OK)) by ozlabs.org (Postfix) with ESMTP id 8E3A5DDF7B for ; Thu, 13 Dec 2007 03:40:46 +1100 (EST) Date: Wed, 12 Dec 2007 10:40:35 -0600 From: Scott Wood To: Anton Vorontsov Subject: Re: [PATCH RFC 0/7] "NAND on UPM" and related patches Message-ID: <20071212164035.GB4329@loki.buserror.net> References: <20071210204705.GA31263@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20071210204705.GA31263@localhost.localdomain> Cc: linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Mon, Dec 10, 2007 at 11:47:05PM +0300, Anton Vorontsov wrote: > 5 - FSL UPM infrastructure: > --------------------------- > UPM address register is shared among UPMs, so we have to do > proper locking. On the other hand, if we know that specific > board using only one UPM we could bypass locking, and gain some > performance win. Not enough to be worth the complexity compared to the overhead of NAND access -- especially in the likely case of a non-SMP build. -Scott