From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from de01egw01.freescale.net (de01egw01.freescale.net [192.88.165.102]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "de01egw01.freescale.net", Issuer "Thawte Premium Server CA" (verified OK)) by ozlabs.org (Postfix) with ESMTP id 917D5DE3E9 for ; Fri, 25 Jan 2008 13:46:58 +1100 (EST) Date: Thu, 24 Jan 2008 20:46:50 -0600 From: Kim Phillips To: linuxppc-dev@ozlabs.org, Kumar Gala Subject: [PATCH 5/9] powerpc: ipic: add interrupt vector 94 Message-Id: <20080124204650.48578c7f.kim.phillips@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Cc: Jerry Huang List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , this is used on the mpc8315 SoC for DMA error interrupts. Signed-off-by: Jerry Huang Signed-off-by: Kim Phillips --- arch/powerpc/sysdev/ipic.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 4c016da..d7f6a70 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -497,6 +497,12 @@ static struct ipic_info ipic_info[] = { .force = IPIC_SIFCR_L, .bit = 27, }, + [94] = { + .mask = IPIC_SIMSR_L, + .prio = 0, + .force = IPIC_SIFCR_L, + .bit = 30, + }, }; static inline u32 ipic_read(volatile u32 __iomem *base, unsigned int reg) -- 1.5.2.2