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From: Stefan Roese <sr@denx.de>
To: linuxppc-dev@ozlabs.org
Cc: Sean MacLennan <smaclennan@pikatech.com>
Subject: Re: ndfc ecc byte order
Date: Fri, 1 Feb 2008 09:12:22 +0100	[thread overview]
Message-ID: <200802010912.22571.sr@denx.de> (raw)
In-Reply-To: <200801302201.04552.sr@denx.de>

On Wednesday 30 January 2008, Stefan Roese wrote:
> On Wednesday 30 January 2008, Sean MacLennan wrote:
> > There seems to be a byte order conflict between the u-boot and Linux
> > ndfc drivers.
> >
> > u-boot has the following:
> >
> >     /* The NDFC uses Smart Media (SMC) bytes order*/
> >     ecc_code[0] = p[2];
> >     ecc_code[1] = p[1];
> >     ecc_code[2] = p[3];
> >
> > the kernel has:
> >
> >     ecc_code[0] = p[1];
> >     ecc_code[1] = p[2];
> >     ecc_code[2] = p[3];
> >
> > I think u-boot has it right since u-boot and kernel software calculated
> > ECCs agree. Anybody know a reason *not* to switch to the SMC byte order?
>
> Please take a look at Kconfig
>
> config MTD_NAND_NDFC
> 	tristate "NDFC NanD Flash Controller"
> 	depends on 4xx && !PPC_MERGE
> 	select MTD_NAND_ECC_SMC
>
> So the SMC byte ordering is selected and it should match the version used
> in U-Boot. In Linux the swapping is done in nand_ecc.c.

Seems that I was incorrect here. Tests showed that writing from Linux and then 
reading back from U-Boot results in ECC errors. My comment above is bogus, 
since nand_calculate_ecc() from nand_ecc.c is not used with HW-ECC generation 
enabled.

I'll send a patch to fix this in a short while.

Best regards,
Stefan

  reply	other threads:[~2008-02-01  8:12 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-01-30 19:52 ndfc ecc byte order Sean MacLennan
2008-01-30 21:01 ` Stefan Roese
2008-02-01  8:12   ` Stefan Roese [this message]
2008-02-01  8:34     ` Stefan Roese

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