Re: [PATCH 2/10] sbc8560: Add v1 device tree source for Wind River SBC8560 board

[David Gibson <david@gibson.dropbear.id.au>]

On Tue, Feb 05, 2008 at 09:44:23AM -0600, Kumar Gala wrote:
> 
> On Feb 4, 2008, at 8:40 PM, David Gibson wrote:
> 
> > On Fri, Feb 01, 2008 at 08:46:32AM -0600, Kumar Gala wrote:
> >>
> >> On Feb 1, 2008, at 1:54 AM, David Gibson wrote:
> >>
> >>> On Thu, Jan 24, 2008 at 06:41:24PM -0500, Paul Gortmaker wrote:
> > [snip]
> >>>> +		epld@5,0 {
> >>>
> >>> I'm not entirely convinced on this two-level representation.  I  
> >>> think
> >>> the FSL people need to get together and define a binding (or set of
> >>> bindings) for their various chipselect style external bus bridges.
> >>
> >> It seems reasonable if you had a FPGA off of the localbus to have a
> >> two level representation.  One for the localbus controller on the FSL
> >> part and the child to describe the FPGA.
> >>
> >> What are you expecting beyond what we have today?  I guess I'm asking
> >> what's missing from the localbus nodes we have?
> >
> > Sorry, I was probably misleading.  All I really meant is that I don't
> > know enough about these FSL bus bridge arrangements to assess if this
> > representation is the most sensible one.  I'm presuming that this
> > chipselect bridge unit is a more-or-less standard ASIC appearing on
> > lots of the FSL chips, so it would be nice to have a standard binding
> > for them, as we do for the roughly-equivalent EBC bridge on 4xx.
> 
> Is there a writeup for EBC?  I'll take a look at it and see if it  
> makes senses for the freescale 'localbus'.

Uh... not as such.  I'll try to write it up and add a binding to
b-w-o.txt next week when I'm back at work for real.  I wouldn't expect
it to be usable as is for the Freescale localbus, but it should be
pretty similar in spirit.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson