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From: Laurent Pinchart <laurentp@cse-semaphore.com>
To: Trent Piepho <xyzzy@speakeasy.org>
Subject: Re: [PATCHv2] powerpc: Describe memory-mapped RAM&ROM chips OF
	bindings
Date: Tue, 1 Apr 2008 14:39:04 +0200
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On Tuesday 01 April 2008 11:18, Trent Piepho wrote:
> On Tue, 1 Apr 2008, Laurent Pinchart wrote:
> > On Monday 31 March 2008 19:06, Sergei Shtylyov wrote:
> >>>        p) Freescale Synchronous Serial Interface
> >>> -	  q) USB EHCI controllers
> >>> +      q) USB EHCI controllers
> >>> +      r) Memory-mapped RAM & ROM
> >>
> >>     Memory-mapped RA/RO Memory again? Should better drop this. :-)
> >
> > You're quite picky, aren't you ? :-)
> >
> > I suppose "Memory-mapped RA & RO" won't be accepted, so what about "Aux=
iliary
> > RAM & ROM" ?
>=20
> Direct-mapped?

=46ine with me. Sergei ?

=2D-=20
Laurent Pinchart
CSE Semaphore Belgium

Chauss=E9e de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
=46 +32 (2) 387 42 75